Lines Matching refs:RA
397 #define RA(r) ((r)<<16)
407 #define TAB(t,a,b) (RT(t) | RA(a) | RB(b))
408 #define SAB(s,a,b) (RS(s) | RA(a) | RB(b))
449 tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff));
451 tcg_out32 (s, ADDIS | RT (ret) | RA (0) | ((arg >> 16) & 0xffff));
453 tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff));
461 tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff));
464 tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0));
493 tcg_out32 (s, LWZ | RT (0) | RA (reg));
494 tcg_out32 (s, MTSPR | RA (0) | CTR);
495 tcg_out32 (s, LWZ | RT (2) | RA (reg) | 4);
557 | RA (r0)
564 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (TCG_AREG0));
567 | RA (r0)
572 | RA (r2)
580 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1));
582 tcg_out32 (s, LWZ | RT (r1) | RA (r0) | 4);
583 tcg_out32 (s, CMP | BF (6) | RA (addr_reg2) | RB (r1));
605 tcg_out32 (s, EXTSB | RA (data_reg) | RS (3));
608 tcg_out32 (s, EXTSH | RA (data_reg) | RS (3));
645 | RA (r0)
650 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
672 tcg_out32 (s, EXTSB | RA (data_reg) | RS (data_reg));
683 tcg_out32 (s, EXTSH | RA (data_reg) | RS (data_reg));
695 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
701 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
706 tcg_out32 (s, LWZ | RT (0) | RA (r0));
707 tcg_out32 (s, LWZ | RT (data_reg) | RA (r0) | 4);
711 tcg_out32 (s, LWZ | RT (data_reg2) | RA (r0));
712 tcg_out32 (s, LWZ | RT (data_reg) | RA (r0) | 4);
753 | RA (r0)
760 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (TCG_AREG0));
763 | RA (r0)
768 | RA (r2)
776 tcg_out32 (s, CMP | (7 << 23) | RA (r2) | RB (r1));
778 tcg_out32 (s, LWZ | RT (r1) | RA (r0) | 4);
779 tcg_out32 (s, CMP | BF (6) | RA (addr_reg2) | RB (r1));
805 | RA (ir)
813 | RA (ir)
844 | RA (r0)
849 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
881 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
888 tcg_out32 (s, ADDI | RT (r1) | RA (r0) | 4);
891 tcg_out32 (s, STW | RS (data_reg2) | RA (r0));
892 tcg_out32 (s, STW | RS (data_reg) | RA (r0) | 4);
925 tcg_out32 (s, STWU | RS (1) | RA (1) | (-frame_size & 0xffff));
929 | RA (1)
933 tcg_out32 (s, STW | RS (0) | RA (1) | (frame_size + LR_OFFSET));
949 | RA (1)
953 tcg_out32 (s, LWZ | RT (0) | RA (1) | (frame_size + LR_OFFSET));
955 tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
971 static void ppc_addi (TCGContext *s, int rt, int ra, tcg_target_long si)
973 if (!si && rt == ra)
977 tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff));
980 tcg_out32 (s, ADDIS | RT (rt) | RA (ra) | h);
981 tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff));
1051 tcg_out32 (s, op | RA (arg1) | (arg2 & 0xffff));
1055 tcg_out32 (s, op | RA (arg1) | RB (0));
1058 tcg_out32 (s, op | RA (arg1) | RB (arg2));
1136 tcg_out32 (s, XORI | RS (arg1) | RA (0) | arg2);
1148 tcg_out32 (s, CNTLZW | RS (arg) | RA (0));
1150 | RA (arg0)
1167 tcg_out32 (s, XORI | RS (arg1) | RA (0) | arg2);
1181 tcg_out32 (s, ADDIC | RT (0) | RA (arg) | 0xffff);
1185 tcg_out32 (s, ADDIC | RT (arg0) | RA (arg) | 0xffff);
1217 | RA (arg0)
1237 | RA (args[0])
1350 tcg_out32 (s, EXTSB | RS (args[0]) | RA (args[0]));
1420 | RA (args[0])
1432 tcg_out32 (s, ANDI | RS (args[1]) | RA (args[0]) | c);
1434 tcg_out32 (s, ANDIS | RS (args[1]) | RA (args[0])
1448 tcg_out32 (s, ORI | RS (args[1]) | RA (args[0])
1451 tcg_out32 (s, ORIS | RS (args[0]) | RA (args[0])
1455 tcg_out32 (s, ORIS | RS (args[1]) | RA (args[0])
1465 tcg_out32 (s, XORI | RS (args[1]) | RA (args[0])
1468 tcg_out32 (s, XORIS | RS (args[1]) | RA (args[0])
1497 tcg_out32 (s, MULLI | RT (args[0]) | RA (args[1])
1543 | RA (args[0])
1557 | RA (args[0])
1570 tcg_out32 (s, SRAWI | RS (args[1]) | RA (args[0]) | SH (args[2]));
1577 | RA (args[0])
1594 | RA (args[0])
1603 tcg_out32 (s, SUBFIC | RT (0) | RA (args[2]) | 32);
1605 | RA (args[0])
1652 tcg_out32 (s, NEG | RT (args[0]) | RA (args[1]));
1691 tcg_out32 (s, EXTSB | RS (args[1]) | RA (args[0]));
1695 | RA (args[0])
1703 tcg_out32 (s, EXTSH | RS (args[1]) | RA (args[0]));
1707 | RA (args[0])
1729 | RA (0)
1738 | RA (args[0])
1762 | RA (a0)
1771 | RA (a0)
1780 | RA (a0)
