Lines Matching refs:instr
104 int FormatVFPRegister(Instruction* instr, const char* format);
105 void PrintMovwMovt(Instruction* instr);
106 int FormatVFPinstruction(Instruction* instr, const char* format);
107 void PrintCondition(Instruction* instr);
108 void PrintShiftRm(Instruction* instr);
109 void PrintShiftImm(Instruction* instr);
110 void PrintShiftSat(Instruction* instr);
111 void PrintPU(Instruction* instr);
115 int FormatRegister(Instruction* instr, const char* option);
116 int FormatOption(Instruction* instr, const char* option);
117 void Format(Instruction* instr, const char* format);
118 void Unknown(Instruction* instr);
124 void DecodeType01(Instruction* instr);
125 void DecodeType2(Instruction* instr);
126 void DecodeType3(Instruction* instr);
127 void DecodeType4(Instruction* instr);
128 void DecodeType5(Instruction* instr);
129 void DecodeType6(Instruction* instr);
131 int DecodeType7(Instruction* instr);
133 void DecodeTypeVFP(Instruction* instr);
134 void DecodeType6CoprocessorIns(Instruction* instr);
136 void DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(Instruction* instr);
137 void DecodeVCMP(Instruction* instr);
138 void DecodeVCVTBetweenDoubleAndSingle(Instruction* instr);
139 void DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr);
180 void Decoder::PrintCondition(Instruction* instr) {
181 Print(cond_names[instr->ConditionValue()]);
210 void Decoder::PrintShiftRm(Instruction* instr) {
211 ShiftOp shift = instr->ShiftField();
212 int shift_index = instr->ShiftValue();
213 int shift_amount = instr->ShiftAmountValue();
214 int rm = instr->RmValue();
218 if ((instr->RegShiftValue() == 0) && (shift == LSL) && (shift_amount == 0)) {
222 if (instr->RegShiftValue() == 0) {
236 int rs = instr->RsValue();
246 void Decoder::PrintShiftImm(Instruction* instr) {
247 int rotate = instr->RotateValue() * 2;
248 int immed8 = instr->Immed8Value();
256 void Decoder::PrintShiftSat(Instruction* instr) {
257 int shift = instr->Bits(11, 7);
261 shift_names[instr->Bit(6) * 2],
262 instr->Bits(11, 7));
268 void Decoder::PrintPU(Instruction* instr) {
269 switch (instr->PUField()) {
322 int Decoder::FormatRegister(Instruction* instr, const char* format) {
325 int reg = instr->RnValue();
329 int reg = instr->RdValue();
333 int reg = instr->RsValue();
337 int reg = instr->RmValue();
341 int reg = instr->RtValue();
347 int rlist = instr->RlistValue();
371 int Decoder::FormatVFPRegister(Instruction* instr, const char* format) {
380 reg = instr->VFPNRegValue(precision);
382 reg = instr->VFPMRegValue(precision);
384 reg = instr->VFPDRegValue(precision);
386 int immed8 = instr->Immed8Value();
405 int Decoder::FormatVFPinstruction(Instruction* instr, const char* format) {
412 void Decoder::PrintMovwMovt(Instruction* instr) {
413 int imm = instr->ImmedMovwMovtValue();
414 int rd = instr->RdValue();
426 int Decoder::FormatOption(Instruction* instr, const char* format) {
429 if (instr->Bit(21) == 0) {
437 if (instr->HasB()) {
444 PrintCondition(instr);
448 double d = instr->DoubleImmedVmov();
454 uint32_t lsbit = instr->Bits(11, 7);
455 uint32_t width = instr->Bits(20, 16) + 1;
456 if (instr->Bit(21) == 0) {
468 if (instr->HasH()) {
486 instr->Bits(width + lsb - 1, lsb));
490 if (instr->HasLink()) {
498 PrintMovwMovt(instr);
503 if (instr->HasL()) {
506 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
507 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
508 instr->Bit(5) == 1) {
522 reinterpret_cast<byte*>(instr->InstructionBits() & 0x0fffffff);
532 "%d", instr->Offset12Value());
539 (instr->Bits(19, 8) << 4) +
540 instr->Bits(3, 0));
545 int offs8 = (instr->ImmedHValue() << 4) | instr->ImmedLValue();
552 PrintPU(instr);
556 return FormatRegister(instr, format);
562 if (instr->TypeValue() == 0) {
563 PrintShiftRm(instr);
565 ASSERT(instr->TypeValue() == 1);
566 PrintShiftImm(instr);
571 PrintShiftSat(instr);
575 PrintShiftRm(instr);
580 PrintSoftwareInterrupt(instr->SvcValue());
584 if (instr->HasSign()) {
590 if (instr->HasS()) {
597 int off = (instr->SImmed24Value() << 2) + 8;
602 reinterpret_cast<byte*>(instr) + off));
618 if (instr->Bit(22) == 0) {
626 return FormatVFPinstruction(instr, format);
630 return FormatVFPRegister(instr, format);
633 if (instr->HasW()) {
651 void Decoder::Format(Instruction* instr, const char* format) {
655 format += FormatOption(instr, format);
669 Unknown(instr); \
674 // For currently unimplemented decodings the disassembler calls Unknown(instr)
676 void Decoder::Unknown(Instruction* instr) {
677 Format(instr, "unknown");
681 void Decoder::DecodeType01(Instruction* instr) {
682 int type = instr->TypeValue();
683 if ((type == 0) && instr->IsSpecialType0()) {
685 if (instr->Bits(7, 4) == 9) {
686 if (instr->Bit(24) == 0) {
688 if (instr->Bit(23) == 0) {
689 if (instr->Bit(21) == 0) {
693 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
699 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
708 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
711 Unknown(instr); // not used by V8
713 } else if ((instr->Bit(20) == 0) && ((instr->Bits(7, 4) & 0xd) == 0xd)) {
715 switch (instr->PUField()) {
717 if (instr->Bit(22) == 0) {
718 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
720 Format(instr, "'memop'cond's 'rd, ['rn], #-'off8");
725 if (instr->Bit(22) == 0) {
726 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
728 Format(instr, "'memop'cond's 'rd, ['rn], #+'off8");
733 if (instr->Bit(22) == 0) {
734 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
736 Format(instr, "'memop'cond's 'rd, ['rn, #-'off8]'w");
741 if (instr->Bit(22) == 0) {
742 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
744 Format(instr, "'memop'cond's 'rd, ['rn, #+'off8]'w");
756 switch (instr->PUField()) {
758 if (instr->Bit(22) == 0) {
759 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
761 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #-'off8");
766 if (instr->Bit(22) == 0) {
767 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
769 Format(instr, "'memop'cond'sign'h 'rd, ['rn], #+'off8");
774 if (instr->Bit(22) == 0) {
775 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
777 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #-'off8]'w");
782 if (instr->Bit(22) == 0) {
783 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
785 Format(instr, "'memop'cond'sign'h 'rd, ['rn, #+'off8]'w");
797 } else if ((type == 0) && instr->IsMiscType0()) {
798 if (instr->Bits(22, 21) == 1) {
799 switch (instr->BitField(7, 4)) {
801 Format(instr, "bx'cond 'rm");
804 Format(instr, "blx'cond 'rm");
807 Format(instr, "bkpt 'off0to3and8to19");
810 Unknown(instr); // not used by V8
813 } else if (instr->Bits(22, 21) == 3) {
814 switch (instr->BitField(7, 4)) {
816 Format(instr, "clz'cond 'rd, 'rm");
819 Unknown(instr); // not used by V8
823 Unknown(instr); // not used by V8
826 switch (instr->OpcodeField()) {
828 Format(instr, "and'cond's 'rd, 'rn, 'shift_op");
832 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
836 Format(instr, "sub'cond's 'rd, 'rn, 'shift_op");
840 Format(instr, "rsb'cond's 'rd, 'rn, 'shift_op");
844 Format(instr, "add'cond's 'rd, 'rn, 'shift_op");
848 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op");
852 Format(instr, "sbc'cond's 'rd, 'rn, 'shift_op");
856 Format(instr, "rsc'cond's 'rd, 'rn, 'shift_op");
860 if (instr->HasS()) {
861 Format(instr, "tst'cond 'rn, 'shift_op");
863 Format(instr, "movw'cond 'mw");
868 if (instr->HasS()) {
869 Format(instr, "teq'cond 'rn, 'shift_op");
878 if (instr->HasS()) {
879 Format(instr, "cmp'cond 'rn, 'shift_op");
881 Format(instr, "movt'cond 'mw");
886 if (instr->HasS()) {
887 Format(instr, "cmn'cond 'rn, 'shift_op");
896 Format(instr, "orr'cond's 'rd, 'rn, 'shift_op");
900 Format(instr, "mov'cond's 'rd, 'shift_op");
904 Format(instr, "bic'cond's 'rd, 'rn, 'shift_op");
908 Format(instr, "mvn'cond's 'rd, 'shift_op");
921 void Decoder::DecodeType2(Instruction* instr) {
922 switch (instr->PUField()) {
924 if (instr->HasW()) {
925 Unknown(instr); // not used in V8
928 Format(instr, "'memop'cond'b 'rd, ['rn], #-'off12");
932 if (instr->HasW()) {
933 Unknown(instr); // not used in V8
936 Format(instr, "'memop'cond'b 'rd, ['rn], #+'off12");
940 Format(instr, "'memop'cond'b 'rd, ['rn, #-'off12]'w");
944 Format(instr, "'memop'cond'b 'rd, ['rn, #+'off12]'w");
956 void Decoder::DecodeType3(Instruction* instr) {
957 switch (instr->PUField()) {
959 VERIFY(!instr->HasW());
960 Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
964 if (instr->HasW()) {
965 VERIFY(instr->Bits(5, 4) == 0x1);
966 if (instr->Bit(22) == 0x1) {
967 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
972 Format(instr, "'memop'cond'b 'rd, ['rn], +'shift_rm");
977 Format(instr, "'memop'cond'b 'rd, ['rn, -'shift_rm]'w");
981 if (instr->HasW() && (instr->Bits(6, 4) == 0x5)) {
982 uint32_t widthminus1 = static_cast<uint32_t>(instr->Bits(20, 16));
983 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
986 if (instr->Bit(22)) {
987 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
989 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
994 } else if (!instr->HasW() && (instr->Bits(6, 4) == 0x1)) {
995 uint32_t lsbit = static_cast<uint32_t>(instr->Bits(11, 7));
996 uint32_t msbit = static_cast<uint32_t>(instr->Bits(20, 16));
998 if (instr->RmValue() == 15) {
999 Format(instr, "bfc'cond 'rd, 'f");
1001 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1007 Format(instr, "'memop'cond'b 'rd, ['rn, +'shift_rm]'w");
1020 void Decoder::DecodeType4(Instruction* instr) {
1021 if (instr->Bit(22) != 0) {
1023 Unknown(instr);
1025 if (instr->HasL()) {
1026 Format(instr, "ldm'cond'pu 'rn'w, 'rlist");
1028 Format(instr, "stm'cond'pu 'rn'w, 'rlist");
1034 void Decoder::DecodeType5(Instruction* instr) {
1035 Format(instr, "b'l'cond 'target");
1039 void Decoder::DecodeType6(Instruction* instr) {
1040 DecodeType6CoprocessorIns(instr);
1044 int Decoder::DecodeType7(Instruction* instr) {
1045 if (instr->Bit(24) == 1) {
1046 if (instr->SvcValue() >= kStopCode) {
1047 Format(instr, "stop'cond 'svc");
1052 instr
1054 *reinterpret_cast<char**>(instr
1056 *reinterpret_cast<char**>(instr
1061 Format(instr, "svc'cond 'svc");
1064 DecodeTypeVFP(instr);
1070 // void Decoder::DecodeTypeVFP(Instruction* instr)
1085 void Decoder::DecodeTypeVFP(Instruction* instr) {
1086 VERIFY((instr->TypeValue() == 7) && (instr->Bit(24) == 0x0) );
1087 VERIFY(instr->Bits(11, 9) == 0x5);
1089 if (instr->Bit(4) == 0) {
1090 if (instr->Opc1Value() == 0x7) {
1092 if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x1)) {
1094 if (instr->SzValue() == 0x1) {
1095 Format(instr, "vmov.f64'cond 'Dd, 'Dm");
1097 Format(instr, "vmov.f32'cond 'Sd, 'Sm");
1099 } else if ((instr->Opc2Value() == 0x0) && (instr->Opc3Value() == 0x3)) {
1101 Format(instr, "vabs.f64'cond 'Dd, 'Dm");
1102 } else if ((instr->Opc2Value() == 0x1) && (instr->Opc3Value() == 0x1)) {
1104 Format(instr, "vneg.f64'cond 'Dd, 'Dm");
1105 } else if ((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3)) {
1106 DecodeVCVTBetweenDoubleAndSingle(instr);
1107 } else if ((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) {
1108 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1109 } else if (((instr->Opc2Value() >> 1) == 0x6) &&
1110 (instr->Opc3Value() & 0x1)) {
1111 DecodeVCVTBetweenFloatingPointAndInteger(instr);
1112 } else if (((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1113 (instr->Opc3Value() & 0x1)) {
1114 DecodeVCMP(instr);
1115 } else if (((instr->Opc2Value() == 0x1)) && (instr->Opc3Value() == 0x3)) {
1116 Format(instr, "vsqrt.f64'cond 'Dd, 'Dm");
1117 } else if (instr->Opc3Value() == 0x0) {
1118 if (instr->SzValue() == 0x1) {
1119 Format(instr, "vmov.f64'cond 'Dd, 'd");
1121 Unknown(instr); // Not used by V8.
1124 Unknown(instr); // Not used by V8.
1126 } else if (instr->Opc1Value() == 0x3) {
1127 if (instr->SzValue() == 0x1) {
1128 if (instr->Opc3Value() & 0x1) {
1129 Format(instr, "vsub.f64'cond 'Dd, 'Dn, 'Dm");
1131 Format(instr, "vadd.f64'cond 'Dd, 'Dn, 'Dm");
1134 Unknown(instr); // Not used by V8.
1136 } else if ((instr->Opc1Value() == 0x2) && !(instr->Opc3Value() & 0x1)) {
1137 if (instr->SzValue() == 0x1) {
1138 Format(instr, "vmul.f64'cond 'Dd, 'Dn, 'Dm");
1140 Unknown(instr); // Not used by V8.
1142 } else if ((instr->Opc1Value() == 0x4) && !(instr->Opc3Value() & 0x1)) {
1143 if (instr->SzValue() == 0x1) {
1144 Format(instr, "vdiv.f64'cond 'Dd, 'Dn, 'Dm");
1146 Unknown(instr); // Not used by V8.
1149 Unknown(instr); // Not used by V8.
1152 if ((instr->VCValue() == 0x0) &&
1153 (instr->VAValue() == 0x0)) {
1154 DecodeVMOVBetweenCoreAndSinglePrecisionRegisters(instr);
1155 } else if ((instr->VCValue() == 0x0) &&
1156 (instr->VAValue() == 0x7) &&
1157 (instr->Bits(19, 16) == 0x1)) {
1158 if (instr->VLValue() == 0) {
1159 if (instr->Bits(15, 12) == 0xF) {
1160 Format(instr, "vmsr'cond FPSCR, APSR");
1162 Format(instr, "vmsr'cond FPSCR, 'rt");
1165 if (instr->Bits(15, 12) == 0xF) {
1166 Format(instr, "vmrs'cond APSR, FPSCR");
1168 Format(instr, "vmrs'cond 'rt, FPSCR");
1177 Instruction* instr) {
1178 VERIFY((instr->Bit(4) == 1) && (instr->VCValue() == 0x0) &&
1179 (instr->VAValue() == 0x0));
1181 bool to_arm_register = (instr->VLValue() == 0x1);
1184 Format(instr, "vmov'cond 'rt, 'Sn");
1186 Format(instr, "vmov'cond 'Sn, 'rt");
1191 void Decoder::DecodeVCMP(Instruction* instr) {
1192 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1193 VERIFY(((instr->Opc2Value() == 0x4) || (instr->Opc2Value() == 0x5)) &&
1194 (instr->Opc3Value() & 0x1));
1197 bool dp_operation = (instr->SzValue() == 1);
1198 bool raise_exception_for_qnan = (instr->Bit(7) == 0x1);
1201 if (instr->Opc2Value() == 0x4) {
1202 Format(instr, "vcmp.f64'cond 'Dd, 'Dm");
1203 } else if (instr->Opc2Value() == 0x5) {
1204 Format(instr, "vcmp.f64'cond 'Dd, #0.0");
1206 Unknown(instr); // invalid
1209 Unknown(instr); // Not used by V8.
1214 void Decoder::DecodeVCVTBetweenDoubleAndSingle(Instruction* instr) {
1215 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1216 VERIFY((instr->Opc2Value() == 0x7) && (instr->Opc3Value() == 0x3));
1218 bool double_to_single = (instr->SzValue() == 1);
1221 Format(instr, "vcvt.f32.f64'cond 'Sd, 'Dm");
1223 Format(instr, "vcvt.f64.f32'cond 'Dd, 'Sm");
1228 void Decoder::DecodeVCVTBetweenFloatingPointAndInteger(Instruction* instr) {
1229 VERIFY((instr->Bit(4) == 0) && (instr->Opc1Value() == 0x7));
1230 VERIFY(((instr->Opc2Value() == 0x8) && (instr->Opc3Value() & 0x1)) ||
1231 (((instr->Opc2Value() >> 1) == 0x6) && (instr->Opc3Value() & 0x1)));
1233 bool to_integer = (instr->Bit(18) == 1);
1234 bool dp_operation = (instr->SzValue() == 1);
1236 bool unsigned_integer = (instr->Bit(16) == 0);
1240 Format(instr, "vcvt.u32.f64'cond 'Sd, 'Dm");
1242 Format(instr, "vcvt.s32.f64'cond 'Sd, 'Dm");
1246 Format(instr, "vcvt.u32.f32'cond 'Sd, 'Sm");
1248 Format(instr, "vcvt.s32.f32'cond 'Sd, 'Sm");
1252 bool unsigned_integer = (instr->Bit(7) == 0);
1256 Format(instr, "vcvt.f64.u32'cond 'Dd, 'Sm");
1258 Format(instr, "vcvt.f64.s32'cond 'Dd, 'Sm");
1262 Format(instr, "vcvt.f32.u32'cond 'Sd, 'Sm");
1264 Format(instr, "vcvt.f32.s32'cond 'Sd, 'Sm");
1276 void Decoder::DecodeType6CoprocessorIns(Instruction* instr) {
1277 VERIFY(instr->TypeValue() == 6);
1279 if (instr->CoprocessorValue() == 0xA) {
1280 switch (instr->OpcodeValue()) {
1283 if (instr->HasL()) {
1284 Format(instr, "vldr'cond 'Sd, ['rn - 4*'imm08@00]");
1286 Format(instr, "vstr'cond 'Sd, ['rn - 4*'imm08@00]");
1291 if (instr->HasL()) {
1292 Format(instr, "vldr'cond 'Sd, ['rn + 4*'imm08@00]");
1294 Format(instr, "vstr'cond 'Sd, ['rn + 4*'imm08@00]");
1303 bool to_vfp_register = (instr->VLValue() == 0x1);
1305 Format(instr, "vldm'cond'pu 'rn'w, {'Sd-'Sd+}");
1307 Format(instr, "vstm'cond'pu 'rn'w, {'Sd-'Sd+}");
1312 Unknown(instr); // Not used by V8.
1314 } else if (instr->CoprocessorValue() == 0xB) {
1315 switch (instr->OpcodeValue()) {
1318 if (instr->Bits(7, 4) != 0x1) {
1319 Unknown(instr); // Not used by V8.
1320 } else if (instr->HasL()) {
1321 Format(instr, "vmov'cond 'rt, 'rn, 'Dm");
1323 Format(instr, "vmov'cond 'Dm, 'rt, 'rn");
1327 if (instr->HasL()) {
1328 Format(instr, "vldr'cond 'Dd, ['rn - 4*'imm08@00]");
1330 Format(instr, "vstr'cond 'Dd, ['rn - 4*'imm08@00]");
1334 if (instr->HasL()) {
1335 Format(instr, "vldr'cond 'Dd, ['rn + 4*'imm08@00]");
1337 Format(instr, "vstr'cond 'Dd, ['rn + 4*'imm08@00]");
1343 bool to_vfp_register = (instr->VLValue() == 0x1);
1345 Format(instr, "vldm'cond'pu 'rn'w, {'Dd-'Dd+}");
1347 Format(instr, "vstm'cond'pu 'rn'w, {'Dd-'Dd+}");
1352 Unknown(instr); // Not used by V8.
1355 Unknown(instr); // Not used by V8.
1379 Instruction* instr = Instruction::At(instr_ptr);
1383 instr->InstructionBits());
1384 if (instr->ConditionField() == kSpecialCondition) {
1385 Unknown(instr);
1396 switch (instr->TypeValue()) {
1399 DecodeType01(instr);
1403 DecodeType2(instr);
1407 DecodeType3(instr);
1411 DecodeType4(instr);
1415 DecodeType5(instr);
1419 DecodeType6(instr);
1423 return DecodeType7(instr);
