Lines Matching refs:instr
190 Instr* pc = reinterpret_cast<Instr*>(pc_);
191 Instr* instr = reinterpret_cast<Instr*>(instructions);
193 *(pc + i) = *(instr + i);
240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift)
246 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift)
249 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift)
252 const Instr kLwRegFpOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
255 const Instr kSwRegFpOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
258 const Instr kLwRegFpNegOffsetPattern = LW | (kRegister_fp_Code << kRsShift)
261 const Instr kSwRegFpNegOffsetPattern = SW | (kRegister_fp_Code << kRsShift)
264 const Instr kRtMask = kRtFieldMask;
265 const Instr kLwSwInstrTypeMask = 0xffe00000;
266 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask;
267 const Instr kLwSwOffsetMask = kImm16Mask;
363 Register Assembler::GetRtReg(Instr instr) {
365 rt.code_ = (instr & kRtFieldMask) >> kRtShift;
370 Register Assembler::GetRsReg(Instr instr) {
372 rs.code_ = (instr & kRsFieldMask) >> kRsShift;
377 Register Assembler::GetRdReg(Instr instr) {
379 rd.code_ = (instr & kRdFieldMask) >> kRdShift;
384 uint32_t Assembler::GetRt(Instr instr) {
385 return (instr & kRtFieldMask) >> kRtShift;
389 uint32_t Assembler::GetRtField(Instr instr) {
390 return instr & kRtFieldMask;
394 uint32_t Assembler::GetRs(Instr instr) {
395 return (instr & kRsFieldMask) >> kRsShift;
399 uint32_t Assembler::GetRsField(Instr instr) {
400 return instr & kRsFieldMask;
404 uint32_t Assembler::GetRd(Instr instr) {
405 return (instr & kRdFieldMask) >> kRdShift;
409 uint32_t Assembler::GetRdField(Instr instr) {
410 return instr & kRdFieldMask;
414 uint32_t Assembler::GetSa(Instr instr) {
415 return (instr & kSaFieldMask) >> kSaShift;
419 uint32_t Assembler::GetSaField(Instr instr) {
420 return instr & kSaFieldMask;
424 uint32_t Assembler::GetOpcodeField(Instr instr) {
425 return instr & kOpcodeMask;
429 uint32_t Assembler::GetFunction(Instr instr) {
430 return (instr & kFunctionFieldMask) >> kFunctionShift;
434 uint32_t Assembler::GetFunctionField(Instr instr) {
435 return instr & kFunctionFieldMask;
439 uint32_t Assembler::GetImmediate16(Instr instr) {
440 return instr & kImm16Mask;
444 uint32_t Assembler::GetLabelConst(Instr instr) {
445 return instr & ~kImm16Mask;
449 bool Assembler::IsPop(Instr instr) {
450 return (instr & ~kRtMask) == kPopRegPattern;
454 bool Assembler::IsPush(Instr instr) {
455 return (instr & ~kRtMask) == kPushRegPattern;
459 bool Assembler::IsSwRegFpOffset(Instr instr) {
460 return ((instr & kLwSwInstrTypeMask) == kSwRegFpOffsetPattern);
464 bool Assembler::IsLwRegFpOffset(Instr instr) {
465 return ((instr & kLwSwInstrTypeMask) == kLwRegFpOffsetPattern);
469 bool Assembler::IsSwRegFpNegOffset(Instr instr) {
470 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
475 bool Assembler::IsLwRegFpNegOffset(Instr instr) {
476 return ((instr & (kLwSwInstrTypeMask | kNegOffset)) ==
501 bool Assembler::IsBranch(Instr instr) {
502 uint32_t opcode = GetOpcodeField(instr);
503 uint32_t rt_field = GetRtField(instr);
504 uint32_t rs_field = GetRsField(instr);
505 uint32_t label_constant = GetLabelConst(instr);
522 bool Assembler::IsBeq(Instr instr) {
523 return GetOpcodeField(instr) == BEQ;
527 bool Assembler::IsBne(Instr instr) {
528 return GetOpcodeField(instr) == BNE;
532 bool Assembler::IsJump(Instr instr) {
533 uint32_t opcode = GetOpcodeField(instr);
534 uint32_t rt_field = GetRtField(instr);
535 uint32_t rd_field = GetRdField(instr);
536 uint32_t function_field = GetFunctionField(instr);
544 bool Assembler::IsJ(Instr instr) {
545 uint32_t opcode = GetOpcodeField(instr);
551 bool Assembler::IsJal(Instr instr) {
552 return GetOpcodeField(instr) == JAL;
555 bool Assembler::IsJr(Instr instr) {
556 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JR;
559 bool Assembler::IsJalr(Instr instr) {
560 return GetOpcodeField(instr) == SPECIAL && GetFunctionField(instr) == JALR;
564 bool Assembler::IsLui(Instr instr) {
565 uint32_t opcode = GetOpcodeField(instr);
571 bool Assembler::IsOri(Instr instr) {
572 uint32_t opcode = GetOpcodeField(instr);
578 bool Assembler::IsNop(Instr instr, unsigned int type) {
581 uint32_t opcode = GetOpcodeField(instr);
582 uint32_t rt = GetRt(instr);
583 uint32_t rs = GetRs(instr);
584 uint32_t sa = GetSa(instr);
599 int32_t Assembler::GetBranchOffset(Instr instr) {
600 ASSERT(IsBranch(instr));
601 return ((int16_t)(instr & kImm16Mask)) << 2;
605 bool Assembler::IsLw(Instr instr) {
606 return ((instr & kOpcodeMask) == LW);
610 int16_t Assembler::GetLwOffset(Instr instr) {
611 ASSERT(IsLw(instr));
612 return ((instr & kImm16Mask));
616 Instr Assembler::SetLwOffset(Instr instr, int16_t offset) {
617 ASSERT(IsLw(instr));
620 Instr temp_instr = LW | (instr & kRsFieldMask) | (instr & kRtFieldMask)
627 bool Assembler::IsSw(Instr instr) {
628 return ((instr & kOpcodeMask) == SW);
632 Instr Assembler::SetSwOffset(Instr instr, int16_t offset) {
633 ASSERT(IsSw(instr));
634 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
638 bool Assembler::IsAddImmediate(Instr instr) {
639 return ((instr & kOpcodeMask) == ADDIU);
643 Instr Assembler::SetAddImmediateOffset(Instr instr, int16_t offset) {
644 ASSERT(IsAddImmediate(instr));
645 return ((instr & ~kImm16Mask) | (offset & kImm16Mask));
649 bool Assembler::IsAndImmediate(Instr instr) {
650 return GetOpcodeField(instr) == ANDI;
655 Instr instr = instr_at(pos);
656 if ((instr & ~kImm16Mask) == 0) {
658 if (instr == 0) {
661 int32_t imm18 =((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
666 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
669 if (IsBranch(instr)) {
670 int32_t imm18 = ((instr & static_cast<int32_t>(kImm16Mask)) << 16) >> 14;
678 } else if (IsLui(instr)) {
679 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
680 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
695 int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
711 Instr instr = instr_at(pos);
712 if ((instr & ~kImm16Mask) == 0) {
720 ASSERT(IsBranch(instr) || IsJ(instr) || IsLui(instr));
721 if (IsBranch(instr)) {
725 instr &= ~kImm16Mask;
729 instr_at_put(pos, instr | (imm16 & kImm16Mask));
730 } else if (IsLui(instr)) {
731 Instr instr_lui = instr_at(pos + 0 * Assembler::kInstrSize);
732 Instr instr_ori = instr_at(pos + 1 * Assembler::kInstrSize);
749 instr &= ~kImm26Mask;
753 instr_at_put(pos, instr | (imm26 & kImm26Mask));
768 Instr instr = instr_at(l.pos());
769 if ((instr & ~kImm16Mask) == 0) {
772 PrintF("%d\n", instr);
794 Instr instr = instr_at(fixup_pos);
795 if (IsBranch(instr)) {
808 ASSERT(IsJ(instr) || IsLui(instr));
860 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
862 emit(instr);
873 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
875 emit(instr);
887 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift)
889 emit(instr);
901 Instr instr = opcode | fmt | (rt.code() << kRtShift)
903 emit(instr);
914 Instr instr =
916 emit(instr);
927 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift)
929 emit(instr);
938 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask);
939 emit(instr);
949 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift)
951 emit(instr);
959 Instr instr = opcode | address;
960 emit(instr);
1322 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift)
1324 emit(instr);
1332 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift)
1334 emit(instr);
1469 Instr break_instr = SPECIAL | BREAK | (code << 6);
1484 emit(reinterpret_cast<Instr>(msg));
1491 Instr instr = SPECIAL | TGE | rs.code() << kRsShift
1493 emit(instr);
1499 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift
1501 emit(instr);
1507 Instr instr =
1509 emit(instr);
1515 Instr instr =
1518 emit(instr);
1524 Instr instr =
1526 emit(instr);
1532 Instr instr =
1534 emit(instr);
1598 // Clz instr requires same GPR number in 'rd' and 'rt' fields.
1605 // Ins instr has 'rt' field as dest, and two uint5: msb, lsb.
1613 // Ext instr has 'rt' field as dest, and two uint5: msb, lsb.
1865 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift
1867 emit(instr);
1884 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask);
1885 emit(instr);
1892 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask);
1893 emit(instr);
1921 Instr instr = instr_at(pc);
1922 ASSERT(IsJ(instr) || IsLui(instr));
1923 if (IsLui(instr)) {
1924 Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
1925 Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
1944 uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
1952 instr &= ~kImm26Mask;
1956 instr_at_put(pc, instr | (imm26 & kImm26Mask));
2125 Instr instr1 = instr_at(pc);
2126 Instr instr2 = instr_at(pc + kInstrSize);
2151 // Patching the address must replace both instr, and flush the i-cache.
2157 Instr instr2 = instr_at(pc + kInstrSize);
2163 // Check we have the result from a li macro-instruction, using instr pair.
2164 Instr instr1 = instr_at(pc);
2190 Instr instr3 = instr_at(pc + 2 * kInstrSize);
2258 Instr instr1 = instr_at(pc);
2260 Instr instr2 = instr_at(pc + 1 * kInstrSize);
2261 Instr instr3 = instr_at(pc + 2 * kInstrSize);
