Lines Matching refs:SseReRg
956 i->Ain.SseReRg.op = op;
957 i->Ain.SseReRg.src = re;
958 i->Ain.SseReRg.dst = rg;
1274 vex_printf("%s ", showAMD64SseOp(i->Ain.SseReRg.op));
1275 ppHRegAMD64(i->Ain.SseReRg.src);
1277 ppHRegAMD64(i->Ain.SseReRg.dst);
1304 //uu vex_printf("v%s ", showAMD64SseOp(i->Ain.SseReRg.op));
1574 if ( (i->Ain.SseReRg.op == Asse_XOR
1575 || i->Ain.SseReRg.op == Asse_CMPEQ32)
1576 && i->Ain.SseReRg.src == i->Ain.SseReRg.dst) {
1581 addHRegUse(u, HRmWrite, i->Ain.SseReRg.dst);
1583 addHRegUse(u, HRmRead, i->Ain.SseReRg.src);
1584 addHRegUse(u, i->Ain.SseReRg.op == Asse_MOV
1586 i->Ain.SseReRg.dst);
1779 mapReg(m, &i->Ain.SseReRg.src);
1780 mapReg(m, &i->Ain.SseReRg.dst);
1831 if (i->Ain.SseReRg.op != Asse_MOV)
1833 *src = i->Ain.SseReRg.src;
1834 *dst = i->Ain.SseReRg.dst;
3321 rexAMode_R( vreg2ireg(i->Ain.SseReRg.dst),
3322 vreg2ireg(i->Ain.SseReRg.src) ));
3324 switch (i->Ain.SseReRg.op) {
3382 p = doAMode_R(p, vreg2ireg(i->Ain.SseReRg.dst),
3383 vreg2ireg(i->Ain.SseReRg.src) );
