Lines Matching refs:RRS
661 toBool( hregClass(am->ARMam1.RRS.base) == HRcInt32
662 && hregIsVirtual(am->ARMam1.RRS.base)
663 && hregClass(am->ARMam1.RRS.index) == HRcInt32
664 && hregIsVirtual(am->ARMam1.RRS.index)
665 && am->ARMam1.RRS.shift >= 0
666 && am->ARMam1.RRS.shift <= 3 );
684 /* FIXME: add RRS matching */
