Lines Matching refs:HReg
41 void ppHRegMIPS(HReg reg, Bool mode64)
104 HReg hregMIPS_GPR0(Bool mode64)
109 HReg hregMIPS_GPR1(Bool mode64)
114 HReg hregMIPS_GPR2(Bool mode64)
119 HReg hregMIPS_GPR3(Bool mode64)
124 HReg hregMIPS_GPR4(Bool mode64)
129 HReg hregMIPS_GPR5(Bool mode64)
134 HReg hregMIPS_GPR6(Bool mode64)
139 HReg hregMIPS_GPR7(Bool mode64)
144 HReg hregMIPS_GPR8(Bool mode64)
149 HReg hregMIPS_GPR9(Bool mode64)
154 HReg hregMIPS_GPR10(Bool mode64)
159 HReg hregMIPS_GPR11(Bool mode64)
164 HReg hregMIPS_GPR12(Bool mode64)
169 HReg hregMIPS_GPR13(Bool mode64)
174 HReg hregMIPS_GPR14(Bool mode64)
179 HReg hregMIPS_GPR15(Bool mode64)
184 HReg hregMIPS_GPR16(Bool mode64)
189 HReg hregMIPS_GPR17(Bool mode64)
194 HReg hregMIPS_GPR18(Bool mode64)
199 HReg hregMIPS_GPR19(Bool mode64)
204 HReg hregMIPS_GPR20(Bool mode64)
209 HReg hregMIPS_GPR21(Bool mode64)
214 HReg hregMIPS_GPR22(Bool mode64)
219 HReg hregMIPS_GPR23(Bool mode64)
224 HReg hregMIPS_GPR24(Bool mode64)
229 HReg hregMIPS_GPR25(Bool mode64)
234 HReg hregMIPS_GPR26(Bool mode64)
239 HReg hregMIPS_GPR27(Bool mode64)
244 HReg hregMIPS_GPR28(Bool mode64)
249 HReg hregMIPS_GPR29(Bool mode64)
254 HReg hregMIPS_GPR30(Bool mode64)
259 HReg hregMIPS_GPR31(Bool mode64)
267 HReg hregMIPS_F0(Bool mode64)
272 HReg hregMIPS_F1(Bool mode64)
277 HReg hregMIPS_F2(Bool mode64)
282 HReg hregMIPS_F3(Bool mode64)
287 HReg hregMIPS_F4(Bool mode64)
292 HReg hregMIPS_F5(Bool mode64)
297 HReg hregMIPS_F6(Bool mode64)
302 HReg hregMIPS_F7(Bool mode64)
307 HReg hregMIPS_F8(Bool mode64)
312 HReg hregMIPS_F9(Bool mode64)
317 HReg hregMIPS_F10(Bool mode64)
322 HReg hregMIPS_F11(Bool mode64)
327 HReg hregMIPS_F12(Bool mode64)
332 HReg hregMIPS_F13(Bool mode64)
337 HReg hregMIPS_F14(Bool mode64)
342 HReg hregMIPS_F15(Bool mode64)
347 HReg hregMIPS_F16(Bool mode64)
352 HReg hregMIPS_F17(Bool mode64)
357 HReg hregMIPS_F18(Bool mode64)
362 HReg hregMIPS_F19(Bool mode64)
367 HReg hregMIPS_F20(Bool mode64)
372 HReg hregMIPS_F21(Bool mode64)
377 HReg hregMIPS_F22(Bool mode64)
382 HReg hregMIPS_F23(Bool mode64)
387 HReg hregMIPS_F24(Bool mode64)
392 HReg hregMIPS_F25(Bool mode64)
397 HReg hregMIPS_F26(Bool mode64)
402 HReg hregMIPS_F27(Bool mode64)
407 HReg hregMIPS_F28(Bool mode64)
412 HReg hregMIPS_F29(Bool mode64)
417 HReg hregMIPS_F30(Bool mode64)
422 HReg hregMIPS_F31(Bool mode64)
427 HReg hregMIPS_PC(Bool mode64)
432 HReg hregMIPS_HI(Bool mode64)
437 HReg hregMIPS_LO(Bool mode64)
442 HReg hregMIPS_D0(void)
447 HReg hregMIPS_D1(void)
452 HReg hregMIPS_D2(void)
457 HReg hregMIPS_D3(void)
462 HReg hregMIPS_D4(void)
467 HReg hregMIPS_D5(void)
472 HReg hregMIPS_D6(void)
477 HReg hregMIPS_D7(void)
482 HReg hregMIPS_D8(void)
487 HReg hregMIPS_D9(void)
492 HReg hregMIPS_D10(void)
497 HReg hregMIPS_D11(void)
502 HReg hregMIPS_D12(void)
507 HReg hregMIPS_D13(void)
512 HReg hregMIPS_D14(void)
517 HReg hregMIPS_D15(void)
522 HReg hregMIPS_FIR(void)
527 HReg hregMIPS_FCCR(void)
532 HReg hregMIPS_FEXR(void)
537 HReg hregMIPS_FENR(void)
542 HReg hregMIPS_FCSR(void)
547 HReg hregMIPS_COND(void)
552 void getAllocableRegs_MIPS(Int * nregs, HReg ** arr, Bool mode64)
559 *arr = LibVEX_Alloc(*nregs * sizeof(HReg));
821 MIPSAMode *MIPSAMode_IR(Int idx, HReg base)
831 MIPSAMode *MIPSAMode_RR(HReg idx, HReg base)
962 MIPSRH *MIPSRH_Reg(HReg reg)
1109 MIPSInstr *MIPSInstr_LI(HReg dst, ULong imm)
1118 MIPSInstr *MIPSInstr_Alu(MIPSAluOp op, HReg dst, HReg srcL, MIPSRH * srcR)
1129 MIPSInstr *MIPSInstr_Shft(MIPSShftOp op, Bool sz32, HReg dst, HReg srcL,
1142 MIPSInstr *MIPSInstr_Unary(MIPSUnaryOp op, HReg dst, HReg src)
1152 MIPSInstr *MIPSInstr_Cmp(Bool syned, Bool sz32, HReg dst, HReg srcL, HReg srcR,
1167 MIPSInstr *MIPSInstr_Mul(Bool syned, Bool wid, Bool sz32, HReg dst, HReg srcL,
1168 HReg srcR)
1182 MIPSInstr *MIPSInstr_Msub(Bool syned, HReg srcL, HReg srcR)
1195 MIPSInstr *MIPSInstr_Madd(Bool syned, HReg srcL, HReg srcR)
1208 MIPSInstr *MIPSInstr_Div(Bool syned, Bool sz32, HReg srcL, HReg srcR)
1220 HReg src)
1260 MIPSInstr *MIPSInstr_XIndir ( HReg dstGA, MIPSAMode* amPC,
1270 MIPSInstr *MIPSInstr_XAssisted ( HReg dstGA, MIPSAMode* amPC,
1281 MIPSInstr *MIPSInstr_Load(UChar sz, HReg dst, MIPSAMode * src, Bool mode64)
1295 MIPSInstr *MIPSInstr_Store(UChar sz, MIPSAMode * dst, HReg src, Bool mode64)
1309 MIPSInstr *MIPSInstr_LoadL(UChar sz, HReg dst, MIPSAMode * src, Bool mode64)
1323 MIPSInstr *MIPSInstr_StoreC(UChar sz, MIPSAMode * dst, HReg src, Bool mode64)
1337 MIPSInstr *MIPSInstr_Mthi(HReg src)
1345 MIPSInstr *MIPSInstr_Mtlo(HReg src)
1353 MIPSInstr *MIPSInstr_Mfhi(HReg dst)
1361 MIPSInstr *MIPSInstr_Mflo(HReg dst)
1370 MIPSInstr *MIPSInstr_RdWrLR(Bool wrLR, HReg gpr)
1379 MIPSInstr *MIPSInstr_FpLdSt(Bool isLoad, UChar sz, HReg reg, MIPSAMode * addr)
1391 MIPSInstr *MIPSInstr_FpUnary(MIPSFpOp op, HReg dst, HReg src)
1401 MIPSInstr *MIPSInstr_FpBinary(MIPSFpOp op, HReg dst, HReg srcL, HReg srcR)
1412 MIPSInstr *MIPSInstr_FpConvert(MIPSFpOp op, HReg dst, HReg src)
1423 MIPSInstr *MIPSInstr_FpCompare(MIPSFpOp op, HReg dst, HReg srcL, HReg srcR,
1436 MIPSInstr *MIPSInstr_MovCond(HReg dst, HReg argL, MIPSRH * argR, HReg condR,
1449 MIPSInstr *MIPSInstr_MtFCSR(HReg src)
1457 MIPSInstr *MIPSInstr_MfFCSR(HReg dst)
1481 static void ppLoadImm(HReg dst, ULong imm, Bool mode64)
1495 HReg r_srcL = i->Min.Alu.srcL;
1508 HReg r_srcL = i->Min.Shft.srcL;
2017 static void mapReg(HRegRemap * m, HReg * r)
2181 Bool isMove_MIPSInstr(MIPSInstr * i, HReg * src, HReg * dst)
2202 void genSpill_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg,
2234 void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2, HReg rreg,
2268 static UInt iregNo(HReg r, Bool mode64)
2278 static UChar fregNo(HReg r, Bool mode64)
2288 static UChar dregNo(HReg r)
