Lines Matching refs:r_dst
308 static MIPSInstr *mk_iMOVds_RR(HReg r_dst, HReg r_src)
310 vassert(hregClass(r_dst) == hregClass(r_src));
312 return MIPSInstr_Alu(Malu_OR, r_dst, r_src, MIPSRH_Reg(r_src));
648 HReg r_dst = newVRegI(env);
656 r_dst, am_addr, mode64));
657 return r_dst;
700 HReg r_dst = newVRegI(env);
719 addInstr(env, MIPSInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
720 return r_dst;
744 HReg r_dst = newVRegI(env);
764 r_dst, r_srcL, ri_srcR));
767 r_dst, r_srcL, ri_srcR));
769 return r_dst;
866 HReg r_dst = newVRegI(env);
872 r_dst, r_srcL, r_srcR));
873 return r_dst;
877 HReg r_dst = newVRegI(env);
892 r_dst, r_srcL, r_srcR));
904 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
907 return r_dst;
1004 HReg r_dst = newVRegI(env);
1021 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1024 return r_dst;
1033 HReg r_dst = newVRegI(env);
1042 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, tHi_1,
1045 return r_dst;
1051 HReg r_dst = newVRegI(env);
1064 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64));
1068 return r_dst;
1085 HReg r_dst = newVRegI(env);
1118 addInstr(env, MIPSInstr_Shft(Mshft_SLL, sz32, r_dst, r_src,
1120 addInstr(env, MIPSInstr_Shft(Mshft_SRA, sz32, r_dst, r_dst,
1122 return r_dst;
1127 HReg r_dst = newVRegI(env);
1131 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1132 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1133 return r_dst;
1138 HReg r_dst = newVRegI(env);
1142 addInstr(env, MIPSInstr_Alu(Malu_NOR, r_dst, r_srcL, r_srcR));
1143 return r_dst;
1149 HReg r_dst = newVRegI(env);
1158 addInstr(env, MIPSInstr_Load(4, r_dst, am_addr, mode64));
1161 return r_dst;
1168 HReg r_dst = newVRegI(env);
1177 addInstr(env, MIPSInstr_Load(8, r_dst, am_addr, mode64));
1180 return r_dst;
1189 HReg r_src, r_dst;
1190 r_dst = newVRegI(env);
1192 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1194 return r_dst;
1200 HReg r_dst = newVRegI(env);
1218 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, r_dst, r_src,
1220 addInstr(env, MIPSInstr_Shft(Mshft_SRL, True, r_dst, r_dst,
1222 return r_dst;
1229 HReg r_dst = newVRegI(env);
1233 addInstr(env, MIPSInstr_Alu(Malu_AND, r_dst, r_src,
1235 return r_dst;
1239 HReg r_dst = newVRegI(env);
1243 r_dst, r_src, MIPSRH_Imm(False, 32)));
1245 r_dst, r_dst, MIPSRH_Imm(False, 32)));
1246 return r_dst;
1267 HReg r_dst = newVRegI(env);
1268 r_dst = iselWordExpr_R(env, e->Iex.Unop.arg);
1269 return r_dst;
1273 HReg r_dst = newVRegI(env);
1277 r_dst, r_src, MIPSRH_Imm(True, 0)));
1278 return r_dst;
1282 HReg r_dst = newVRegI(env);
1291 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, tmp,
1293 return r_dst;
1297 HReg r_dst = newVRegI(env);
1304 addInstr(env, MIPSInstr_Cmp(False, True, r_dst, r_src,
1306 return r_dst;
1310 HReg r_dst = newVRegI(env);
1313 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1316 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1318 addInstr(env, MIPSInstr_Shft(Mshft_SRA, True, r_dst, r_dst,
1320 return r_dst;
1328 HReg r_dst = newVRegI(env);
1330 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, hregMIPS_GPR0(mode64),
1332 addInstr(env, MIPSInstr_Alu(Malu_OR, r_dst, r_dst,
1334 return r_dst;
1338 HReg r_dst = newVRegI(env);
1340 addInstr(env, MIPSInstr_Unary(Mun_CLZ, r_dst, r_src));
1341 return r_dst;
1346 HReg r_dst = newVRegI(env);
1355 addInstr(env, MIPSInstr_Cmp(False, !(env->mode64), r_dst, r_src,
1357 return r_dst;
1399 HReg r_dst = newVRegI(env);
1403 addInstr(env, MIPSInstr_Load(toUChar(sizeofIRType(ty)), r_dst, am_addr,
1405 return r_dst;
1416 * r_dst = cond && rX
1419 * r_dst = tmp + r_dst
1424 HReg r_dst = newVRegI(env);
1434 addInstr(env, MIPSInstr_Alu(Malu_ADD, r_dst, r_tmp,
1437 return r_dst;
1446 HReg r_dst = newVRegI(env);
1466 addInstr(env, MIPSInstr_LI(r_dst, (ULong) l));
1467 return r_dst;
1472 HReg r_dst = newVRegI(env);
1482 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
1483 return r_dst;
1712 HReg r_dst = newVRegI(env);
1716 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
1717 addInstr(env, MIPSInstr_Alu(Malu_SUB, r_dst, r_dst, r_srcR));
1723 r_dst, mode64));
1727 HReg r_dst = iselWordExpr_R_wrk(env, e);
1733 r_dst, mode64));
1790 HReg r_dst = newVRegI(env);
1794 r_dst, r_srcL, r_srcR));
1988 HReg r_dst = newVRegI(env);
1995 r_dst, r_srcL, r_srcR));
2185 HReg r_dst = newVRegF(env);
2189 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2190 return r_dst;
2194 HReg r_dst = newVRegF(env);
2197 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2198 return r_dst;
2206 HReg r_dst = newVRegF(env);
2215 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 4, r_dst, am_addr));
2218 return r_dst;
2247 HReg r_dst = newVRegF(env);
2256 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2259 return r_dst;
2344 HReg r_dst = newVRegF(env);
2362 addInstr(env, MIPSInstr_FpConvert(Mfp_CVTSW, r_dst, tmp));
2365 return r_dst;
2454 HReg r_dst = newVRegD(env);
2458 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2459 return r_dst;
2465 HReg r_dst = newVRegD(env);
2468 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2469 return r_dst;
2660 HReg r_dst = newVRegD(env);
2725 addInstr(env, MIPSInstr_FpLdSt(True /*load */ , 8, r_dst, am_addr));
2729 return r_dst;
2845 HReg r_dst = lookupIRTemp(env, tmp);
2847 addInstr(env, mk_iMOVds_RR(r_dst, r_src));
2904 HReg r_dst = lookupIRTemp(env, d->tmp);
2905 addInstr(env, mk_iMOVds_RR(r_dst, hregMIPS_GPR2(mode64)));
2929 HReg r_dst = lookupIRTemp(env, res);
2931 addInstr(env, MIPSInstr_Load(4, r_dst, r_addr, mode64));
2934 addInstr(env, MIPSInstr_Load(8, r_dst, r_addr, mode64));
2943 HReg r_dst = lookupIRTemp(env, res);
2949 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
2953 addInstr(env, MIPSInstr_LI(r_dst, 0x1));
