Lines Matching refs:env
62 GPR11 if mode64: not used - calls by ptr / env ptr for some langs
296 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
299 vassert(tmp < env->n_vregmap);
300 return env->vregmapLo[tmp];
304 ISelEnv* env, IRTemp tmp )
307 vassert(tmp < env->n_vregmap);
308 vassert(env->vregmapMedLo[tmp] != INVALID_HREG);
309 *vrLO = env->vregmapLo[tmp];
310 *vrHI = env->vregmapMedLo[tmp];
315 HReg* vrLo, ISelEnv* env, IRTemp tmp )
317 vassert(!env->mode64);
319 vassert(tmp < env->n_vregmap);
320 vassert(env->vregmapMedLo[tmp] != INVALID_HREG);
321 *vrHi = env->vregmapHi[tmp];
322 *vrMedHi = env->vregmapMedHi[tmp];
323 *vrMedLo = env->vregmapMedLo[tmp];
324 *vrLo = env->vregmapLo[tmp];
327 static void addInstr ( ISelEnv* env, PPCInstr* instr )
329 addHInstr(env->code, instr);
331 ppPPCInstr(instr, env->mode64);
336 static HReg newVRegI ( ISelEnv* env )
338 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64),
340 env->vreg_ctr++;
344 static HReg newVRegF ( ISelEnv* env )
346 HReg reg = mkHReg(env->vreg_ctr, HRcFlt64, True/*virtual reg*/);
347 env->vreg_ctr++;
351 static HReg newVRegV ( ISelEnv* env )
353 HReg reg = mkHReg(env->vreg_ctr, HRcVec128, True/*virtual reg*/);
354 env->vreg_ctr++;
376 static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e );
377 static HReg iselWordExpr_R ( ISelEnv* env, IRExpr* e );
388 static PPCRH* iselWordExpr_RH_wrk ( ISelEnv* env,
390 static PPCRH* iselWordExpr_RH ( ISelEnv* env,
395 static PPCRI* iselWordExpr_RI_wrk ( ISelEnv* env, IRExpr* e );
396 static PPCRI* iselWordExpr_RI ( ISelEnv* env, IRExpr* e );
401 static PPCRH* iselWordExpr_RH5u_wrk ( ISelEnv* env, IRExpr* e );
402 static PPCRH* iselWordExpr_RH5u ( ISelEnv* env, IRExpr* e );
407 static PPCRH* iselWordExpr_RH6u_wrk ( ISelEnv* env, IRExpr* e );
408 static PPCRH* iselWordExpr_RH6u ( ISelEnv* env, IRExpr* e );
421 static PPCAMode* iselWordExpr_AMode_wrk ( ISelEnv* env, IRExpr* e, IRType xferTy );
422 static PPCAMode* iselWordExpr_AMode ( ISelEnv* env, IRExpr* e, IRType xferTy );
426 ISelEnv* env, IRExpr* e );
429 ISelEnv* env, IRExpr* e );
434 ISelEnv* env, IRExpr* e );
436 ISelEnv* env
440 ISelEnv* env, IRExpr* e );
442 ISelEnv* env, IRExpr* e );
444 static PPCCondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e );
445 static PPCCondCode iselCondCode ( ISelEnv* env, IRExpr* e );
447 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e );
448 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e );
450 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e );
451 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e );
453 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e );
454 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e );
457 static HReg iselDfp64Expr_wrk ( ISelEnv* env, IRExpr* e );
458 static HReg iselDfp64Expr ( ISelEnv* env, IRExpr* e );
461 static void iselDfp128Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env,
463 static void iselDfp128Expr ( HReg* rHi, HReg* rLo, ISelEnv* env,
482 static void add_to_sp ( ISelEnv* env, UInt n )
484 HReg sp = StackFramePtr(env->mode64);
486 addInstr(env, PPCInstr_Alu( Palu_ADD, sp, sp,
490 static void sub_from_sp ( ISelEnv* env, UInt n )
492 HReg sp = StackFramePtr(env->mode64);
494 addInstr(env, PPCInstr_Alu( Palu_SUB, sp, sp,
504 static HReg get_sp_aligned16 ( ISelEnv* env )
506 HReg r = newVRegI(env);
507 HReg align16 = newVRegI(env);
508 addInstr(env, mk_iMOVds_RR(r, StackFramePtr(env->mode64)));
510 addInstr(env, PPCInstr_Alu( Palu_ADD, r, r,
513 addInstr(env,
514 PPCInstr_LI(align16, 0xFFFFFFFFFFFFFFF0ULL, env->mode64));
515 addInstr(env, PPCInstr_Alu(Palu_AND, r,r, PPCRH_Reg(align16)));
522 static HReg mk_LoadRR32toFPR ( ISelEnv* env,
525 HReg fr_dst = newVRegF(env);
528 vassert(!env->mode64);
532 sub_from_sp( env, 16 ); // Move SP down 16 bytes
533 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
534 am_addr1 = PPCAMode_IR( 4, StackFramePtr(env->mode64) );
537 addInstr(env, PPCInstr_Store( 4, am_addr0, r_srcHi, env->mode64 ));
538 addInstr(env, PPCInstr_Store( 4, am_addr1, r_srcLo, env->mode64 ));
541 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fr_dst, am_addr0));
543 add_to_sp( env, 16 ); // Reset SP
548 static HReg mk_LoadR64toFPR ( ISelEnv* env, HReg r_src )
550 HReg fr_dst = newVRegF(env);
553 vassert(env->mode64);
556 sub_from_sp( env, 16 ); // Move SP down 16 bytes
557 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
560 addInstr(env, PPCInstr_Store( 8, am_addr0, r_src, env->mode64 ));
563 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fr_dst, am_addr0));
565 add_to_sp( env, 16 ); // Reset SP
573 static PPCAMode* advance4 ( ISelEnv* env, PPCAMode* am )
590 PPCAMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr,
623 roff = iselWordExpr_R(env, off);
624 rtmp = newVRegI(env);
625 addInstr(env, PPCInstr_Alu(
629 addInstr(env, PPCInstr_Alu(
633 addInstr(env, PPCInstr_Shft(
635 env->mode64 ? False : True/*F:64-bit, T:32-bit shift*/,
638 addInstr(env, PPCInstr_Alu(
643 PPCAMode_RR( GuestStatePtr(env->mode64), rtmp );
673 void doHelperCall ( ISelEnv* env,
684 Bool mode64 = env->mode64;
689 = (!mode64) && env->vbi->host_ppc32_regalign_int64_args;
799 addInstr(env, mk_iMOVds_RR( argregs[argreg],
806 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32 ||
807 typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
809 if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32) {
811 addInstr(env,
813 iselWordExpr_R(env, args[i]) ));
820 iselInt64Expr(&rHi,&rLo, env, args[i]);
822 addInstr(env, mk_iMOVds_RR( argregs[argreg++], rHi ));
824 addInstr(env, mk_iMOVds_RR( argregs[argreg], rLo));
828 addInstr(env, mk_iMOVds_RR( argregs[argreg],
829 iselWordExpr_R(env, args[i]) ));
845 tmpregs[argreg] = newVRegI(env);
846 addInstr(env, mk_iMOVds_RR( tmpregs[argreg],
853 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32 ||
854 typeOfIRExpr(env->type_env, args[i]) == Ity_I64);
856 if (typeOfIRExpr(env->type_env, args[i]) == Ity_I32) {
857 tmpregs[argreg] = iselWordExpr_R(env, args[i]);
864 iselInt64Expr(&rHi,&rLo, env, args[i]);
869 tmpregs[argreg] = iselWordExpr_R(env, args[i]);
885 cc = iselCondCode( env, guard );
896 addInstr( env, mk_iMOVds_RR( argregs[i], tmpregs[i] ) );
905 addInstr(env
915 //void set_FPU_rounding_default ( ISelEnv* env )
917 // HReg fr_src = newVRegF(env);
918 // HReg r_src = newVRegI(env);
925 // addInstr(env, PPCInstr_LI(r_src, 0x0, env->mode64));
926 // if (env->mode64) {
927 // fr_src = mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
929 // fr_src = mk_LoadRR32toFPR( env, r_src, r_src ); // 2*I32 -> F64
931 // addInstr(env, PPCInstr_FpLdFPSCR( fr_src ));
935 static HReg roundModeIRtoPPC ( ISelEnv* env, HReg r_rmIR )
950 HReg r_rmPPC = newVRegI(env);
951 HReg r_tmp1 = newVRegI(env);
952 HReg r_tmp2 = newVRegI(env);
954 vassert(hregClass(r_rmIR) == HRcGPR(env->mode64));
962 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
965 addInstr( env, PPCInstr_Alu( Palu_AND,
968 addInstr( env, PPCInstr_Alu( Palu_XOR,
988 env->previous_rm.) If 'mode' is a single IR temporary 't' and
989 env->previous_rm is also just 't', then the setting is skipped.
1005 void _set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode, Bool dfp_rm )
1007 HReg fr_src = newVRegF(env);
1010 vassert(typeOfIRExpr(env->type_env,mode) == Ity_I32);
1013 if (env->previous_rm
1014 && env->previous_rm->tag == Iex_RdTmp
1016 && env->previous_rm->Iex.RdTmp.tmp == mode->Iex.RdTmp.tmp) {
1018 vassert(typeOfIRExpr(env->type_env, env->previous_rm) == Ity_I32);
1023 env->previous_rm = mode;
1029 r_src = roundModeIRtoPPC( env, iselWordExpr_R(env, mode) );
1032 if (env->mode64) {
1034 HReg r_tmp1 = newVRegI( env );
1035 addInstr( env,
1038 fr_src = mk_LoadR64toFPR( env, r_tmp1 );
1040 fr_src = mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
1044 HReg r_zero = newVRegI( env );
1045 addInstr( env, PPCInstr_LI( r_zero, 0, env->mode64 ) );
1046 fr_src = mk_LoadRR32toFPR( env, r_src, r_zero );
1048 fr_src = mk_LoadRR32toFPR( env, r_src, r_src ); // 2*I32 -> F64
1053 addInstr(env, PPCInstr_FpLdFPSCR( fr_src, dfp_rm ));
1056 static void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode )
1058 _set_FPU_rounding_mode(env, mode, False);
1061 static void set_FPU_DFP_rounding_mode ( ISelEnv* env, IRExpr* mode )
1063 _set_FPU_rounding_mode(env, mode, True);
1073 static HReg generate_zeroes_V128 ( ISelEnv* env )
1075 HReg dst = newVRegV(env);
1076 addInstr(env, PPCInstr_AvBinary(Pav_XOR, dst, dst, dst));
1082 static HReg generate_ones_V128 ( ISelEnv* env )
1084 HReg dst = newVRegV(env);
1086 addInstr(env, PPCInstr_AvSplat(8, dst, src));
1098 static HReg mk_AvDuplicateRI( ISelEnv* env, IRExpr* e )
1101 HReg dst = newVRegV(env);
1102 PPCRI* ri = iselWordExpr_RI(env, e);
1103 IRType ty = typeOfIRExpr(env->type_env,e);
1115 HReg v1 = newVRegV(env);
1116 HReg v2 = newVRegV(env);
1117 addInstr(env, PPCInstr_AvSplat(sz, v1, PPCVI5s_Imm(-16)));
1118 addInstr(env, PPCInstr_AvSplat(sz, v2, PPCVI5s_Imm(simm6-16)));
1119 addInstr(env,
1126 HReg v1 = newVRegV(env);
1127 HReg v2 = newVRegV(env);
1128 addInstr(env, PPCInstr_AvSplat(sz, v1, PPCVI5s_Imm(-16)));
1129 addInstr(env, PPCInstr_AvSplat(sz, v2, PPCVI5s_Imm(simm6+16)));
1130 addInstr(env,
1137 addInstr(env, PPCInstr_AvSplat(sz, dst, PPCVI5s_Imm(simm6)));
1142 r_src = newVRegI(env);
1143 addInstr(env, PPCInstr_LI(r_src, (Long)simm32, env->mode64));
1155 HReg v_src = newVRegV(env);
1158 sub_from_sp( env, 32 ); // Move SP down
1160 r_aligned16 = get_sp_aligned16( env );
1164 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, env->mode64 ));
1167 addInstr(env, PPCInstr_AvLdSt( True/*ld*/, 4, v_src, am_off12 ) );
1168 add_to_sp( env, 32 ); // Reset SP
1171 addInstr(env, PPCInstr_AvSplat(sz, dst, PPCVI5s_Reg(v_src)));
1178 static HReg isNan ( ISelEnv* env, HReg vSrc )
1184 zeros = mk_AvDuplicateRI(env, mkU32(0));
1185 msk_exp = mk_AvDuplicateRI(env, mkU32(0x7F800000));
1186 msk_mnt = mk_AvDuplicateRI(env, mkU32(0x7FFFFF));
1187 expt = newVRegV(env);
1188 mnts = newVRegV(env);
1189 vIsNan = newVRegV(env);
1194 addInstr(env, PPCInstr_AvBinary(Pav_AND, expt, vSrc, msk_exp));
1195 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPEQU, expt, expt, msk_exp));
1196 addInstr(env, PPCInstr_AvBinary(Pav_AND, mnts, vSrc, msk_mnt));
1197 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPGTU, mnts, mnts, zeros));
1198 addInstr(env, PPCInstr_AvBinary(Pav_AND, vIsNan, expt, mnts));
1222 static HReg iselWordExpr_R ( ISelEnv* env, IRExpr* e )
1224 HReg r = iselWordExpr_R_wrk(env, e);
1230 vassert(hregClass(r) == HRcGPR(env->mode64));
1236 static HReg iselWordExpr_R_wrk ( ISelEnv* env, IRExpr* e )
1238 Bool mode64 = env->mode64;
1242 IRType ty = typeOfIRExpr(env->type_env,e);
1250 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
1258 r_dst = newVRegI(env);
1259 am_addr = iselWordExpr_AMode( env, e->Iex.Load.addr, ty/*of xfer*/ );
1260 addInstr(env, PPCInstr_Load( toUChar(sizeofIRType(ty)),
1289 HReg r_dst = newVRegI(env);
1290 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1295 ri_srcR = iselWordExpr_RH(env, True/*signed*/,
1299 ri_srcR = iselWordExpr_RH(env, False/*signed*/,
1305 addInstr(env, PPCInstr_Alu(aluOp, r_dst, r_srcL, ri_srcR));
1322 HReg r_dst = newVRegI(env);
1323 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1329 ri_srcR = iselWordExpr_RH5u(env, e->Iex.Binop.arg2);
1331 ri_srcR = iselWordExpr_RH6u(env, e->Iex.Binop.arg2);
1341 HReg tmp = newVRegI(env);
1342 addInstr(env, PPCInstr_Shft(Pshft_SHL,
1345 addInstr(env, PPCInstr_Shft(shftOp,
1356 addInstr(env
1359 addInstr(env, PPCInstr_Shft(shftOp, True/*32bit shift*/,
1371 HReg r_dst = newVRegI(env);
1372 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1373 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1374 addInstr( env,
1389 HReg r_dst = newVRegI(env);
1390 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1391 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1393 addInstr( env,
1411 HReg r_dst = newVRegI(env);
1412 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1413 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1414 addInstr(env, PPCInstr_MulL(syned, False/*lo32*/, sz32,
1423 HReg tLo = newVRegI(env);
1424 HReg tHi = newVRegI(env);
1425 HReg r_dst = newVRegI(env);
1427 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1428 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
1429 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
1432 addInstr(env, PPCInstr_MulL(syned,
1435 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1437 addInstr(env, PPCInstr_Alu(Palu_OR,
1446 HReg dst = newVRegI(env);
1447 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1448 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1449 addInstr(env, PPCInstr_Cmp(syned, True/*32bit cmp*/,
1451 addInstr(env, PPCInstr_MfCR(dst));
1452 addInstr(env, PPCInstr_Alu(Palu_AND, dst, dst,
1460 HReg dst = newVRegI(env);
1461 HReg srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
1462 PPCRH* srcR = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
1464 addInstr(env, PPCInstr_Cmp(syned, False/*64bit cmp*/,
1466 addInstr(env, PPCInstr_MfCR(dst));
1467 addInstr(env, PPCInstr_Alu(Palu_AND, dst, dst,
1473 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
1474 HReg r2 = iselWordExpr_R(env, e->Iex.Binop.arg2);
1475 HReg rdst = newVRegI(env);
1477 addInstr(env, mk_iMOVds_RR(rdst, r1));
1478 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
1480 addInstr(env, PPCInstr_CMov(cc, rdst, PPCRI_Reg(r2)));
1485 HReg r_Hi = iselWordExpr_R(env, e->Iex.Binop.arg1);
1486 HReg r_Lo = iselWordExpr_R(env, e->Iex.Binop.arg2);
1487 HReg r_dst = newVRegI(env);
1488 HReg msk = newVRegI(env);
1491 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1493 addInstr(env, PPCInstr_LI(msk, 0xFFFFFFFF, mode64));
1494 addInstr(env, PPCInstr_Alu( Palu_AND, r_Lo, r_Lo,
1496 addInstr(env, PPCInstr_Alu( Palu_OR, r_dst, r_dst,
1509 HReg r_ccPPC = newVRegI(env);
1510 HReg r_ccIR = newVRegI(env);
1511 HReg r_ccIR_b0 = newVRegI(env);
1512 HReg r_ccIR_b2 = newVRegI(env);
1513 HReg r_ccIR_b6 = newVRegI(env);
1516 fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
1517 fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
1518 addInstr(env, PPCInstr_FpCmp(r_ccPPC, fr_srcL, fr_srcR));
1521 fr_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1);
1522 fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2);
1523 addInstr(env, PPCInstr_Dfp64Cmp(r_ccPPC, fr_srcL, fr_srcR));
1526 iselDfp128Expr(&fr_srcL, &fr_srcL_lo, env, e->Iex.Binop.arg1);
1527 iselDfp128Expr(&fr_srcR, &fr_srcR_lo, env, e->Iex.Binop.arg2);
1528 addInstr(env, PPCInstr_Dfp128Cmp(r_ccPPC, fr_srcL, fr_srcL_lo,
1544 addInstr(env, PPCInstr_Shft(Pshft_SHR, True/*32bit shift*/,
1547 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR_b0,
1549 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b0,
1553 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
1556 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b2,
1560 addInstr(env, PPCInstr_Shft(Pshft_SHR, True/*32bit shift*/,
1563 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR_b6,
1565 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
1568 addInstr(env, PPCInstr_Alu(Palu_AND, r_ccIR_b6,
1572 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR,
1574 addInstr(env, PPCInstr_Alu(Palu_OR, r_ccIR,
1582 HReg r1 = StackFramePtr(env->mode64);
1584 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1585 HReg ftmp = newVRegF(env);
1586 HReg idst = newVRegI(env);
1589 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1591 sub_from_sp( env, 16 );
1592 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, True/*int32*/,
1597 addInstr(env, PPCInstr_FpSTFIW(r1, ftmp));
1598 addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
1602 addInstr(env, PPCInstr_Unary(Pun_EXTSW, idst, idst));
1604 add_to_sp( env, 16 );
1607 //set_FPU_rounding_default( env );
1613 HReg r1 = StackFramePtr(env->mode64);
1615 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
1616 HReg idst = newVRegI(env);
1617 HReg ftmp = newVRegF(env);
1620 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1622 sub_from_sp( env, 16 );
1623 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
1627 addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
1628 addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/));
1629 add_to_sp( env, 16 );
1632 //set_FPU_rounding_default( env );
1649 HReg r_dst = newVRegI(env);
1650 HReg r_src = iselWordExpr_R(env, expr32);
1651 addInstr(env, PPCInstr_Alu(Palu_AND, r_dst,
1663 HReg r_dst = newVRegI(env);
1665 = iselWordExpr_AMode( env, mi.bindee[0], Ity_I16/*xfer*/ );
1666 addInstr(env, PPCInstr_Load(2,r_dst,amode, mode64));
1677 HReg r_dst = newVRegI(env);
1678 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1681 addInstr(env, PPCInstr_Alu(Palu_AND,r_dst,r_src,
1686 HReg r_dst = newVRegI(env);
1687 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1689 addInstr(env,
1692 addInstr(env,
1700 HReg r_dst = newVRegI(env);
1701 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1703 addInstr(env,
1706 addInstr(env,
1713 HReg r_dst = newVRegI(env);
1714 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1717 addInstr(env,
1720 addInstr(env,
1726 HReg r_dst = newVRegI(env);
1727 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1731 addInstr(env,
1741 HReg r_dst = newVRegI(env);
1742 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1743 addInstr(env, PPCInstr_Unary(Pun_NOT,r_dst,r_src));
1749 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1752 HReg r_dst = newVRegI(env);
1753 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1754 addInstr(env,
1763 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1767 return iselWordExpr_R(env, e->Iex.Unop.arg);
1772 return iselWordExpr_R(env, e->Iex.Unop.arg);
1778 HReg r_dst = newVRegI(env);
1779 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1781 addInstr(env,
1789 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1796 iselInt128Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1804 HReg r_dst = newVRegI(env);
1805 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1806 addInstr(env, PPCInstr_Set(cond,r_dst));
1814 HReg r_dst = newVRegI(env);
1815 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1816 addInstr(env, PPCInstr_Set(cond,r_dst));
1817 addInstr(env,
1820 addInstr(env,
1828 HReg r_dst = newVRegI(env);
1829 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1830 addInstr(env, PPCInstr_Set(cond,r_dst));
1831 addInstr(env, PPCInstr_Shft(Pshft_SHL, False/*64bit shift*/,
1833 addInstr(env, PPCInstr_Shft(Pshft_SAR, False/*64bit shift*/,
1846 r_dst = newVRegI(env);
1847 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1848 addInstr(env, PPCInstr_Unary(op_clz,r_dst,r_src));
1858 r_dst = newVRegI(env);
1859 r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1860 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1861 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1866 HReg r_dst = newVRegI(env);
1867 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1868 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1869 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1870 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
1876 HReg r_dst = newVRegI(env);
1877 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
1879 addInstr(env, PPCInstr_Unary(Pun_NEG,r_dst,r_src));
1880 addInstr(env, PPCInstr_Alu(Palu_OR, r_dst, r_dst, PPCRH_Reg(r_src)));
1881 addInstr(env, PPCInstr_Shft(Pshft_SAR, False/*64bit shift*/,
1888 HReg dst = newVRegI(env);
1889 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1891 sub_from_sp( env, 32 ); // Move SP down 32 bytes
1894 r_aligned16 = get_sp_aligned16( env );
1899 addInstr(env,
1901 addInstr(env,
1904 add_to_sp( env, 32 ); // Reset SP
1912 HReg dst = newVRegI(env);
1913 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1915 sub_from_sp( env, 32 ); // Move SP down 32 bytes
1918 r_aligned16 = get_sp_aligned16( env );
1923 addInstr(env,
1925 addInstr(env,
1931 add_to_sp( env, 32 ); // Reset SP
1940 return iselWordExpr_R(env, e->Iex.Unop.arg);
1948 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
1949 HReg r_dst = newVRegI(env);
1951 sub_from_sp( env, 16 ); // Move SP down 16 bytes
1955 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
1958 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
1960 add_to_sp( env, 16 ); // Reset SP
1972 HReg fr_src = iselFltExpr(env, e->Iex.Unop.arg);
1973 HReg r_dst = newVRegI(env);
1975 sub_from_sp( env, 16 ); // Move SP down 16 bytes
1979 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 4,
1982 addInstr(env, PPCInstr_Load( 4, r_dst, am_addr, mode64 ));
1984 add_to_sp( env, 16 ); // Reset SP
1992 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
1993 HReg r_dst = newVRegI(env);
1995 sub_from_sp( env, 16 ); // Move SP down 16 bytes
1999 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
2002 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
2003 add_to_sp( env, 16 ); // Reset SP
2012 HReg r_dst = newVRegI(env);
2021 addInstr(env, mk_iMOVds_RR( argregs[argreg++],
2022 iselWordExpr_R(env, e->Iex.Unop.arg) ) );
2027 addInstr(env, PPCInstr_Call( cc, (Addr64)(fdescr[0]), argiregs ) );
2029 addInstr(env, mk_iMOVds_RR(r_dst, argregs[0]));
2037 HReg r_dst = newVRegI(env);
2046 addInstr(env, mk_iMOVds_RR( argregs[argreg++],
2047 iselWordExpr_R(env, e->Iex.Unop.arg) ) );
2052 addInstr(env, PPCInstr_Call( cc, (Addr64)(fdescr[0]), argiregs ) );
2054 addInstr(env, mk_iMOVds_RR(r_dst, argregs[0]));
2068 HReg r_dst = newVRegI(env);
2071 addInstr(env, PPCInstr_Load( toUChar(sizeofIRType(ty)),
2080 = genGuestArrayOffset( env, e->Iex.GetI.descr,
2082 HReg r_dst = newVRegI(env);
2084 addInstr(env, PPCInstr_Load( toUChar(8),
2089 addInstr(env, PPCInstr_Load( toUChar(4),
2098 HReg r_dst = newVRegI(env);
2107 doHelperCall( env, False, NULL,
2111 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
2119 HReg r_dst = newVRegI(env);
2129 addInstr(env, PPCInstr_LI(r_dst, (ULong)l, mode64));
2137 typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
2139 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
2140 HReg rX = iselWordExpr_R(env, e->Iex.Mux0X.exprX);
2141 PPCRI* r0 = iselWordExpr_RI(env, e->Iex.Mux0X.expr0);
2142 HReg r_dst = newVRegI(env);
2143 HReg r_tmp = newVRegI(env);
2144 addInstr(env, mk_iMOVds_RR(r_dst,rX));
2145 addInstr(env, PPCInstr_Alu(Palu_AND, r_tmp,
2147 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2149 addInstr(env, PPCInstr_CMov(cc,r_dst,r0));
2201 static Bool sane_AMode ( ISelEnv* env, PPCAMode* am )
2203 Bool mode64 = env->mode64;
2222 PPCAMode* iselWordExpr_AMode ( ISelEnv* env, IRExpr* e, IRType xferTy )
2224 PPCAMode* am = iselWordExpr_AMode_wrk(env, e, xferTy);
2225 vassert(sane_AMode(env, am));
2230 static PPCAMode* iselWordExpr_AMode_wrk ( ISelEnv* env, IRExpr* e, IRType xferTy )
2232 IRType ty = typeOfIRExpr(env->type_env,e);
2234 if (env->mode64) {
2258 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2264 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2265 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2281 iselWordExpr_R(env, e->Iex.Binop.arg1) );
2287 HReg r_base = iselWordExpr_R(env, e->Iex.Binop.arg1);
2288 HReg r_idx = iselWordExpr_R(env, e->Iex.Binop.arg2);
2296 return PPCAMode_IR( 0, iselWordExpr_R(env,e) );
2309 static PPCRH* iselWordExpr_RH ( ISelEnv* env, Bool syned, IRExpr* e )
2311 PPCRH* ri = iselWordExpr_RH_wrk(env, syned, e);
2320 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2329 static PPCRH* iselWordExpr_RH_wrk ( ISelEnv* env, Bool syned, IRExpr* e )
2333 IRType ty = typeOfIRExpr(env->type_env,e);
2335 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2343 case Ico_U64: vassert(env->mode64);
2362 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2372 static PPCRI* iselWordExpr_RI ( ISelEnv* env, IRExpr* e )
2374 PPCRI* ri = iselWordExpr_RI_wrk(env, e);
2380 vassert(hregClass(ri->Pri.Reg) == HRcGPR(env->mode64));
2389 static PPCRI* iselWordExpr_RI_wrk ( ISelEnv* env, IRExpr* e )
2392 IRType ty = typeOfIRExpr(env->type_env,e);
2394 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2400 case Ico_U64: vassert(env->mode64);
2411 return PPCRI_Reg( iselWordExpr_R ( env, e ) );
2421 static PPCRH* iselWordExpr_RH5u ( ISelEnv* env, IRExpr* e )
2424 vassert(!env->mode64);
2425 ri = iselWordExpr_RH5u_wrk(env, e);
2433 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2442 static PPCRH* iselWordExpr_RH5u_wrk ( ISelEnv* env, IRExpr* e )
2444 IRType ty = typeOfIRExpr(env->type_env,e);
2456 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2466 static PPCRH* iselWordExpr_RH6u ( ISelEnv* env, IRExpr* e )
2469 vassert(env->mode64);
2470 ri = iselWordExpr_RH6u_wrk(env, e);
2478 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2487 static PPCRH* iselWordExpr_RH6u_wrk ( ISelEnv* env, IRExpr* e )
2489 IRType ty = typeOfIRExpr(env->type_env,e);
2501 return PPCRH_Reg( iselWordExpr_R ( env, e ) );
2511 static PPCCondCode iselCondCode ( ISelEnv* env, IRExpr* e )
2514 return iselCondCode_wrk(env,e);
2518 static PPCCondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
2521 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1);
2526 HReg r_zero = newVRegI(env);
2527 addInstr(env, PPCInstr_LI(r_zero, 0, env->mode64));
2528 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2536 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2546 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
2547 HReg tmp = newVRegI(env);
2549 addInstr(env, PPCInstr_Alu(Palu_AND, tmp,
2551 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2562 HReg arg = iselWordExpr_R(env, e->Iex.Unop.arg);
2563 HReg tmp = newVRegI(env);
2564 addInstr(env, PPCInstr_Alu(Palu_AND, tmp, arg,
2566 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2576 HReg r1 = iselWordExpr_R(env, e->Iex.Unop.arg);
2577 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2594 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2595 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2596 addInstr(env, PPCInstr_Cmp(syned, True/*32bit cmp*/,
2615 if (!env->mode64) {
2617 HReg tmp = newVRegI(env);
2618 iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
2619 addInstr(env, PPCInstr_Alu(Palu_OR, tmp, lo, PPCRH_Reg(hi)));
2620 addInstr(env, PPCInstr_Cmp(False/*sign*/, True/*32bit cmp*/,
2624 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
2625 addInstr(env, PPCInstr_Cmp(False/*sign*/, False/*64bit cmp*/,
2643 HReg r1 = iselWordExpr_R(env, e->Iex.Binop.arg1);
2644 PPCRH* ri2 = iselWordExpr_RH(env, syned, e->Iex.Binop.arg2);
2645 vassert(env->mode64);
2646 addInstr(env, PPCInstr_Cmp(syned, False/*64bit cmp*/,
2660 HReg r_src = lookupIRTemp(env, e->Iex.RdTmp.tmp);
2661 HReg src_masked = newVRegI(env);
2662 addInstr(env,
2665 addInstr(env,
2688 ISelEnv* env, IRExpr* e )
2690 vassert(env->mode64);
2691 iselInt128Expr_wrk(rHi, rLo, env, e);
2695 vassert(hregClass(*rHi) == HRcGPR(env->mode64));
2697 vassert(hregClass(*rLo) == HRcGPR(env->mode64));
2703 ISelEnv* env, IRExpr* e )
2706 vassert(typeOfIRExpr(env->type_env,e) == Ity_I128);
2710 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
2720 HReg tLo = newVRegI(env);
2721 HReg tHi = newVRegI(env);
2723 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2724 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2725 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
2728 addInstr(env, PPCInstr_MulL(syned,
2738 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2739 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2767 HReg* rLo, ISelEnv* env, IRExpr* e )
2769 vassert(!env->mode64);
2770 iselInt128Expr_to_32x4_wrk(rHi, rMedHi, rMedLo, rLo, env, e);
2786 ISelEnv* env, IRExpr* e )
2789 vassert(typeOfIRExpr(env->type_env,e) == Ity_I128);
2793 lookupIRTempQuad( rHi, rMedHi, rMedLo, rLo, env, e->Iex.RdTmp.tmp);
2802 iselInt64Expr(rHi, rMedHi, env, e->Iex.Binop.arg1);
2803 iselInt64Expr(rMedLo, rLo, env, e->Iex.Binop.arg2);
2823 ISelEnv* env, IRExpr* e )
2825 vassert(!env->mode64);
2826 iselInt64Expr_wrk(rHi, rLo, env, e);
2838 ISelEnv* env, IRExpr* e )
2841 vassert(typeOfIRExpr(env->type_env,e) == Ity_I64);
2845 HReg tLo = newVRegI(env);
2846 HReg tHi = newVRegI(env);
2847 HReg r_addr = iselWordExpr_R(env, e->Iex.Load.addr);
2848 vassert(!env->mode64);
2849 addInstr(env, PPCInstr_Load( 4/*byte-load*/,
2852 addInstr(env, PPCInstr_Load( 4/*byte-load*/,
2865 HReg tLo = newVRegI(env);
2866 HReg tHi = newVRegI(env);
2868 addInstr(env, PPCInstr_LI(tHi, (Long)(Int)wHi, False/*mode32*/));
2869 addInstr(env, PPCInstr_LI(tLo, (Long)(Int)wLo, False/*mode32*/));
2877 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp);
2885 PPCAMode* am_addr4 = advance4(env, am_addr);
2886 HReg tLo = newVRegI(env);
2887 HReg tHi = newVRegI(env);
2888 addInstr(env, PPCInstr_Load( 4, tHi, am_addr, False/*mode32*/ ));
2889 addInstr(env, PPCInstr_Load( 4, tLo, am_addr4, False/*mode32*/ ));
2898 HReg tLo = newVRegI(env);
2899 HReg tHi = newVRegI(env);
2902 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
2903 HReg r_tmp = newVRegI(env);
2905 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.Mux0X.expr0);
2906 iselInt64Expr(&eXHi, &eXLo, env, e->Iex.Mux0X.exprX);
2907 addInstr(env, mk_iMOVds_RR(tHi,eXHi));
2908 addInstr(env, mk_iMOVds_RR(tLo,eXLo));
2910 addInstr(env, PPCInstr_Alu(Palu_AND,
2912 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
2915 addInstr(env, PPCInstr_CMov(cc,tHi,PPCRI_Reg(e0Hi)));
2916 addInstr(env, PPCInstr_CMov(cc,tLo,PPCRI_Reg(e0Lo)));
2929 HReg tLo = newVRegI(env);
2930 HReg tHi = newVRegI(env);
2932 HReg r_srcL = iselWordExpr_R(env, e->Iex.Binop.arg1);
2933 HReg r_srcR = iselWordExpr_R(env, e->Iex.Binop.arg2);
2934 addInstr(env, PPCInstr_MulL(False/*signedness irrelevant*/,
2937 addInstr(env, PPCInstr_MulL(syned,
2950 HReg tLo = newVRegI(env);
2951 HReg tHi = newVRegI(env);
2954 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2955 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2956 addInstr(env, PPCInstr_Alu(op, tHi, xHi, PPCRH_Reg(yHi)));
2957 addInstr(env, PPCInstr_Alu(op, tLo, xLo, PPCRH_Reg(yLo)));
2966 HReg tLo = newVRegI(env);
2967 HReg tHi = newVRegI(env);
2968 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2969 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2970 addInstr(env, PPCInstr_AddSubC( True/*add*/, True /*set carry*/,
2972 addInstr(env, PPCInstr_AddSubC( True/*add*/, False/*read carry*/,
2981 *rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
2982 *rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
2987 HReg tLo = newVRegI(env);
2988 HReg tHi = newVRegI(env);
2989 HReg r1 = StackFramePtr(env->mode64);
2992 HReg fsrc = iselDblExpr(env, e->Iex.Binop.arg2);
2993 HReg ftmp = newVRegF(env);
2995 vassert(!env->mode64);
2997 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2999 sub_from_sp( env, 16 );
3000 addInstr(env, PPCInstr_FpCftI(False/*F->I*/, False/*int64*/,
3003 addInstr(env, PPCInstr_FpLdSt(False/*store*/, 8, ftmp, zero_r1));
3004 addInstr(env, PPCInstr_Load(4, tHi, zero_r1, False/*mode32*/));
3005 addInstr(env, PPCInstr_Load(4, tLo, four_r1, False/*mode32*/));
3006 add_to_sp( env, 16 );
3009 //set_FPU_rounding_default( env );
3028 HReg tmp1 = newVRegI(env);
3029 HReg tmp2 = newVRegI(env);
3030 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
3032 addInstr(env, PPCInstr_Alu(Palu_OR, tmp1, argHi, PPCRH_Reg(argLo)));
3034 addInstr(env, PPCInstr_Unary(Pun_NEG,tmp2,tmp1));
3035 addInstr(env, PPCInstr_Alu(Palu_OR, tmp2, tmp2, PPCRH_Reg(tmp1)));
3036 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
3046 HReg zero32 = newVRegI(env);
3047 HReg resHi = newVRegI(env);
3048 HReg resLo = newVRegI(env);
3049 iselInt64Expr(&argHi, &argLo, env, e->Iex.Unop.arg);
3050 vassert(env->mode64 == False);
3051 addInstr(env, PPCInstr_LI(zero32, 0, env->mode64));
3053 addInstr(env, PPCInstr_AddSubC( False/*sub*/, True/*set carry*/,
3055 addInstr(env, PPCInstr_AddSubC( False/*sub*/, False/*read carry*/,
3058 addInstr(env, PPCInstr_Alu(Palu_OR, resLo, resLo, PPCRH_Reg(argLo)));
3059 addInstr(env, PPCInstr_Alu(Palu_OR, resHi, resHi, PPCRH_Reg(argHi)));
3067 HReg tHi = newVRegI(env);
3068 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
3069 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
3078 HReg tHi = newVRegI(env);
3079 HReg tLo = iselWordExpr_R(env, e->Iex.Unop.arg);
3080 addInstr(env, PPCInstr_LI(tHi, 0, False/*mode32*/));
3095 env, e->Iex.Unop.arg);
3110 env, e->Iex.Unop.arg);
3121 HReg tLo = newVRegI(env);
3122 HReg tHi = newVRegI(env);
3123 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
3125 sub_from_sp( env, 32 ); // Move SP down 32 bytes
3128 r_aligned16 = get_sp_aligned16( env );
3134 addInstr(env,
3138 addInstr(env,
3140 addInstr(env,
3143 add_to_sp( env, 32 ); // Reset SP
3151 HReg tLo = newVRegI(env);
3152 HReg tHi = newVRegI(env);
3153 PPCCondCode cond = iselCondCode(env, e->Iex.Unop.arg);
3154 addInstr(env, PPCInstr_Set(cond,tLo));
3155 addInstr(env, PPCInstr_Shft(Pshft_SHL, True/*32bit shift*/,
3157 addInstr(env, PPCInstr_Shft(Pshft_SAR, True/*32bit shift*/,
3159 addInstr(env, mk_iMOVds_RR(tHi, tLo));
3167 HReg tmpLo = newVRegI(env);
3168 HReg tmpHi = newVRegI(env);
3169 iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
3170 addInstr(env, PPCInstr_Unary(Pun_NOT,tmpLo,xLo));
3171 addInstr(env, PPCInstr_Unary(Pun_NOT,tmpHi,xHi));
3182 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
3183 HReg r_dstLo = newVRegI(env);
3184 HReg r_dstHi = newVRegI(env);
3186 sub_from_sp( env, 16 ); // Move SP down 16 bytes
3191 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
3195 addInstr(env, PPCInstr_Load( 4, r_dstHi,
3197 addInstr(env, PPCInstr_Load( 4, r_dstLo,
3202 add_to_sp( env, 16 ); // Reset SP
3207 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
3209 HReg r_dstLo = newVRegI(env);
3210 HReg r_dstHi = newVRegI(env);
3213 sub_from_sp( env, 16 ); // Move SP down 16 bytes
3218 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
3222 addInstr(env, PPCInstr_Load( 4, r_dstHi,
3224 addInstr(env, PPCInstr_Load( 4, r_dstLo,
3229 add_to_sp( env, 16 ); // Reset SP
3239 HReg tLo = newVRegI(env);
3240 HReg tHi = newVRegI(env);
3244 Bool mode64 = env->mode64;
3252 iselInt64Expr( &tmpHi, &tmpLo, env, e->Iex.Unop.arg );
3255 addInstr( env, mk_iMOVds_RR( argregs[argreg++], tmpHi ) );
3258 addInstr( env, mk_iMOVds_RR( argregs[argreg], tmpLo ) );
3263 addInstr( env, PPCInstr_Call( cc, (Addr64)target, argiregs ) );
3264 addInstr( env, mk_iMOVds_RR( tHi, argregs[argreg-1] ) );
3265 addInstr( env, mk_iMOVds_RR( tLo, argregs[argreg] ) );
3277 HReg tLo = newVRegI(env);
3278 HReg tHi = newVRegI(env);
3282 Bool mode64 = env->mode64;
3290 iselInt64Expr(&tmpHi, &tmpLo, env, e->Iex.Unop.arg);
3293 addInstr(env, mk_iMOVds_RR( argregs[argreg++], tmpHi ));
3296 addInstr(env, mk_iMOVds_RR( argregs[argreg], tmpLo));
3302 addInstr(env, PPCInstr_Call( cc, (Addr64)target, argiregs ) );
3303 addInstr(env, mk_iMOVds_RR(tHi, argregs[argreg-1]));
3304 addInstr(env, mk_iMOVds_RR(tLo, argregs[argreg]));
3329 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e )
3331 HReg r = iselFltExpr_wrk( env, e );
3341 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
3343 Bool mode64 = env->mode64;
3345 IRType ty = typeOfIRExpr(env->type_env,e);
3349 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3354 HReg r_dst = newVRegF(env);
3356 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F32/*xfer*/);
3357 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 4, r_dst, am_addr));
3362 HReg r_dst = newVRegF(env);
3364 GuestStatePtr(env->mode64) );
3365 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 4, r_dst, am_addr ));
3398 HReg fsrc = iselDblExpr(env, e->Iex.Unop.arg);
3399 HReg fdst = newVRegF(env);
3400 PPCAMode* zero_r1 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3402 sub_from_sp( env, 16 );
3404 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 4,
3407 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 4,
3409 add_to_sp( env, 16 );
3415 HReg fdst = newVRegF(env);
3416 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3417 HReg r1 = StackFramePtr(env->mode64);
3421 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3423 sub_from_sp( env, 16 );
3425 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3426 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3427 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3431 add_to_sp( env, 16 );
3434 //set_FPU_rounding_default( env );
3438 HReg fdst = newVRegF(env);
3440 HReg r1 = StackFramePtr(env->mode64);
3444 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3447 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3449 sub_from_sp( env, 16 );
3451 addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/));
3452 addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
3453 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3454 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3458 add_to_sp( env, 16 );
3461 //set_FPU_rounding_default( env );
3500 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e )
3502 HReg r = iselDblExpr_wrk( env, e );
3512 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e )
3514 Bool mode64 = env->mode64;
3515 IRType ty = typeOfIRExpr(env->type_env,e);
3520 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3541 HReg r_srcHi = newVRegI(env);
3542 HReg r_srcLo = newVRegI(env);
3543 addInstr(env, PPCInstr_LI(r_srcHi, u.u32x2[0], mode64));
3544 addInstr(env, PPCInstr_LI(r_srcLo, u.u32x2[1], mode64));
3545 return mk_LoadRR32toFPR( env, r_srcHi, r_srcLo );
3547 HReg r_src = newVRegI(env);
3548 addInstr(env, PPCInstr_LI(r_src, u.u64, mode64));
3549 return mk_LoadR64toFPR( env, r_src ); // 1*I64 -> F64
3555 HReg r_dst = newVRegF(env);
3558 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_F64/*xfer*/);
3559 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, r_dst, am_addr));
3565 HReg r_dst = newVRegF(env);
3568 addInstr(env, PPCInstr_FpLdSt( True/*load*/, 8, r_dst, am_addr ));
3583 HReg r_dst = newVRegF(env);
3584 HReg r_srcML = iselDblExpr(env, e->Iex.Qop.details->arg2);
3585 HReg r_srcMR = iselDblExpr(env, e->Iex.Qop.details->arg3);
3586 HReg r_srcAcc = iselDblExpr(env, e->Iex.Qop.details->arg4);
3587 set_FPU_rounding_mode( env, e->Iex.Qop.details->arg1 );
3588 addInstr(env, PPCInstr_FpMulAcc(fpop, r_dst,
3609 HReg r_dst = newVRegF(env);
3610 env, triop->arg2);
3611 HReg r_srcR = iselDblExpr(env, triop->arg3);
3612 set_FPU_rounding_mode( env, triop->arg1 );
3613 addInstr(env, PPCInstr_FpBinary(fpop, r_dst, r_srcL, r_srcR));
3622 HReg r_dst = newVRegF(env);
3623 HReg r_srcL = iselDblExpr(env, triop->arg2);
3624 HReg r_srcR = iselDblExpr(env, triop->arg3);
3625 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
3628 addInstr(env, PPCInstr_DfpQuantize(fpop, r_dst, r_srcL, r_srcR, rmc));
3642 HReg fr_dst = newVRegF(env);
3643 HReg fr_src = iselDblExpr(env, e->Iex.Binop.arg2);
3644 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3645 addInstr(env, PPCInstr_FpUnary(fpop, fr_dst, fr_src));
3653 HReg r_dst = newVRegF(env);
3654 HReg r_src = iselDblExpr(env, e->Iex.Binop.arg2);
3655 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3656 addInstr(env, PPCInstr_FpRSP(r_dst, r_src));
3657 //set_FPU_rounding_default( env );
3663 HReg fdst = newVRegF(env);
3664 HReg isrc = iselWordExpr_R(env, e->Iex.Binop.arg2);
3665 HReg r1 = StackFramePtr(env->mode64);
3669 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3671 sub_from_sp( env, 16 );
3673 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3674 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3675 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3680 add_to_sp( env, 16 );
3683 //set_FPU_rounding_default( env );
3687 HReg fdst = newVRegF(env);
3689 HReg r1 = StackFramePtr(env->mode64);
3693 iselInt64Expr(&isrcHi, &isrcLo, env, e->Iex.Binop.arg2);
3696 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3698 sub_from_sp( env, 16 );
3700 addInstr(env, PPCInstr_Store(4, zero_r1, isrcHi, False/*mode32*/));
3701 addInstr(env, PPCInstr_Store(4, four_r1, isrcLo, False/*mode32*/));
3702 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fdst, zero_r1));
3703 addInstr(env, PPCInstr_FpCftI(True/*I->F*/, False/*int64*/,
3708 add_to_sp( env, 16 );
3711 //set_FPU_rounding_default( env );
3732 HReg fr_dst = newVRegF(env);
3733 HReg fr_src = iselDblExpr(env, e->Iex.Unop.arg);
3734 addInstr(env, PPCInstr_FpUnary(fpop, fr_dst, fr_src));
3746 iselInt64Expr( &r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
3747 return mk_LoadRR32toFPR( env, r_srcHi, r_srcLo );
3749 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3750 return mk_LoadR64toFPR( env, r_src );
3759 HReg src = iselWordExpr_R(env, e->Iex.Unop.arg);
3760 HReg fr_dst = newVRegF(env);
3763 sub_from_sp( env, 16 ); // Move SP down 16 bytes
3764 am_addr = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3767 addInstr(env, PPCInstr_Store( 4, am_addr, src, env->mode64 ));
3771 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 4, fr_dst, am_addr));
3773 add_to_sp( env, 16 ); // Reset SP
3779 HReg res = iselFltExpr(env, e->Iex.Unop.arg);
3790 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
3792 HReg r_cond = iselWordExpr_R(env, e->Iex.Mux0X.cond);
3793 HReg frX = iselDblExpr(env, e->Iex.Mux0X.exprX);
3794 HReg fr0 = iselDblExpr(env, e->Iex.Mux0X.expr0);
3795 HReg fr_dst = newVRegF(env);
3796 HReg r_tmp = newVRegI(env);
3797 addInstr(env, PPCInstr_Alu(Palu_AND, r_tmp,
3799 addInstr(env, PPCInstr_FpUnary( Pfp_MOV, fr_dst, frX ));
3800 addInstr(env, PPCInstr_Cmp(False/*unsigned*/, True/*32bit cmp*/,
3802 addInstr(env, PPCInstr_FpCMov( cc, fr_dst, fr0 ));
3812 static HReg iselDfp64Expr(ISelEnv* env, IRExpr* e)
3814 HReg r = iselDfp64Expr_wrk( env, e );
3821 static HReg iselDfp64Expr_wrk(ISelEnv* env, IRExpr* e)
3823 Bool mode64 = env->mode64;
3824 IRType ty = typeOfIRExpr( env->type_env, e );
3831 return lookupIRTemp( env, e->Iex.RdTmp.tmp );
3836 HReg r_dst = newVRegF( env );
3839 addInstr( env, PPCInstr_FpLdSt( True/*load*/, 8, r_dst, am_addr ) );
3845 HReg r_dst = newVRegF( env );
3850 HReg fr_dst = newVRegF(env);
3857 iselInt64Expr( &r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
3858 return mk_LoadRR32toFPR( env, r_srcHi, r_srcLo );
3860 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
3861 return mk_LoadR64toFPR( env, r_src );
3866 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
3868 addInstr(env, PPCInstr_Dfp64Unary(Pfp_DXEX, fr_dst, fr_src));
3876 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Unop.arg);
3877 addInstr(env, PPCInstr_ExtractExpD128(Pfp_DXEXQ, fr_dst,
3882 HReg fr_src = iselDfp64Expr(env, e->Iex.Unop.arg);
3883 addInstr(env, PPCInstr_Dfp64Unary(Pfp_DCTDP, fr_dst, fr_src));
3887 iselDfp128Expr( &r_dstHi, &r_dstLo, env, e->Iex.Unop.arg );
3890 iselDfp128Expr( &r_dstHi, &r_dstLo, env, e->Iex.Unop.arg );
3893 HReg fr_srcL = iselDblExpr(env, e->Iex.Binop.arg1);
3894 HReg fr_srcR = iselDblExpr(env, e->Iex.Binop.arg2);
3896 addInstr(env, PPCInstr_Dfp64Binary(Pfp_DIEX, fr_dst, fr_srcL,
3911 HReg fr_dst = newVRegF(env);
3912 HReg r_srcHi = newVRegF(env);
3913 HReg r_srcLo = newVRegF(env);
3915 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
3916 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
3917 addInstr(env, PPCInstr_DfpD128toD64(fpop, fr_dst, r_srcHi, r_srcLo));
3922 HReg fr_dst = newVRegF(env);
3923 HReg r_srcHi = newVRegF(env);
3924 HReg r_srcLo = newVRegF(env);
3926 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
3927 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
3928 addInstr(env, PPCInstr_DfpD128toD64(fpop, fr_dst, r_srcHi, r_srcLo));
3937 HReg fr_dst = newVRegF(env);
3938 HReg fr_src = newVRegF(env);
3939 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
3941 fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
3942 addInstr(env, PPCInstr_DfpRound(fr_dst, fr_src, r_rmc));
3949 HReg fr_dst = newVRegF(env);
3958 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg2);
3959 set_FPU_DFP_rounding_mode( env, e->Iex.Binop.arg1 );
3960 addInstr(env, PPCInstr_Dfp64Unary(fpop, fr_dst, fr_src));
3971 HReg fr_src = iselDfp64Expr(env, e->Iex.Binop.arg1);
3972 PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2);
3974 addInstr(env, PPCInstr_DfpShift(fpop, fr_dst, fr_src, shift));
3985 HReg fr_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1);
3986 HReg fr_srcR = iselDfp64Expr(env, e->Iex.Binop.arg2);
3987 addInstr(env, PPCInstr_Dfp64Binary(fpop, fr_dst, fr_srcL, fr_srcR));
4013 HReg r_dst = newVRegF( env );
4014 HReg r_srcL = iselDfp64Expr( env, triop->arg2 );
4015 HReg r_srcR = iselDfp64Expr( env, triop->arg3 );
4017 set_FPU_DFP_rounding_mode( env, triop->arg1 );
4018 addInstr( env, PPCInstr_Dfp64Binary( fpop, r_dst, r_srcL, r_srcR ) );
4028 HReg r_dst = newVRegF(env);
4029 HReg r_srcL = iselDfp64Expr(env, triop->arg2);
4030 HReg r_srcR = iselDfp64Expr(env, triop->arg3);
4031 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
4033 addInstr(env, PPCInstr_DfpQuantize(fpop, r_dst, r_srcL, r_srcR,
4043 static void iselDfp128Expr(HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e)
4045 iselDfp128Expr_wrk( rHi, rLo, env, e );
4051 static void iselDfp128Expr_wrk(HReg* rHi, HReg *rLo, ISelEnv* env, IRExpr* e)
4054 vassert( typeOfIRExpr(env->type_env,e) == Ity_D128 );
4058 lookupIRTempPair( rHi, rLo, env, e->Iex.RdTmp.tmp );
4064 HReg r_dstHi = newVRegF(env);
4065 HReg r_dstLo = newVRegF(env);
4068 HReg r_src = iselDfp64Expr(env, e->Iex.Unop.arg);
4071 addInstr(env, PPCInstr_DfpI64StoD128(fpop, r_dstHi, r_dstLo,
4075 HReg r_src = iselDfp64Expr(env, e->Iex.Unop.arg);
4082 addInstr(env, PPCInstr_Dfp128Unary(fpop, r_dstHi, r_dstLo,
4097 r_srcHi = iselDfp64Expr( env, e->Iex.Binop.arg1 );
4098 r_srcLo = iselDfp64Expr( env, e->Iex.Binop.arg2 );
4105 HReg fr_dst = newVRegF(env);
4107 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
4108 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4109 addInstr(env, PPCInstr_DfpD128toD64(fpop, fr_dst, r_srcHi, r_srcLo));
4120 HReg fr_dst_hi = newVRegF(env);
4121 HReg fr_dst_lo = newVRegF(env);
4122 PPCRI* shift = iselWordExpr_RI(env, e->Iex.Binop.arg2);
4125 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg1);
4130 addInstr(env, PPCInstr_DfpShift128(fpop, fr_dst_hi, fr_dst_lo,
4138 HReg r_dstHi = newVRegF(env);
4139 HReg r_dstLo = newVRegF(env);
4140 PPCRI* r_rmc = iselWordExpr_RI(env, e->Iex.Binop.arg1);
4143 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4145 addInstr(env, PPCInstr_DfpRound128(r_dstHi, r_dstLo,
4152 HReg r_dstHi = newVRegF(env);
4153 HReg r_dstLo = newVRegF(env);
4154 HReg r_srcL = newVRegF(env);
4156 r_srcL = iselDfp64Expr(env, e->Iex.Binop.arg1);
4157 iselDfp128Expr(&r_srcHi, &r_srcLo, env, e->Iex.Binop.arg2);
4158 addInstr(env, PPCInstr_InsertExpD128(Pfp_DIEXQ,
4193 HReg r_dstHi = newVRegV( env );
4194 HReg r_dstLo = newVRegV( env );
4195 HReg r_srcRHi = newVRegV( env );
4196 HReg r_srcRLo = newVRegV( env );
4199 iselDfp128Expr( &r_dstHi, &r_dstLo, env, triop->arg2 );
4200 iselDfp128Expr( &r_srcRHi, &r_srcRLo, env, triop->arg3 );
4201 set_FPU_rounding_mode( env, triop->arg1 );
4202 addInstr( env,
4215 HReg r_dstHi = newVRegF(env);
4216 HReg r_dstLo = newVRegF(env);
4217 HReg r_srcHi = newVRegF(env);
4218 HReg r_srcLo = newVRegF(env);
4219 PPCRI* rmc = iselWordExpr_RI(env, triop->arg1);
4222 iselDfp128Expr(&r_dstHi, &r_dstLo, env, triop->arg2);
4223 iselDfp128Expr(&r_srcHi, &r_srcLo, env, triop->arg3);
4226 addInstr(env, PPCInstr_DfpQuantize128(fpop, r_dstHi, r_dstLo,
4243 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e )
4245 HReg r = iselVecExpr_wrk( env, e );
4255 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
4257 Bool mode64 = env->mode64;
4260 IRType ty = typeOfIRExpr(env->type_env,e);
4265 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
4271 HReg dst = newVRegV(env);
4272 addInstr(env,
4281 HReg v_dst = newVRegV(env);
4283 am_addr = iselWordExpr_AMode(env, e->Iex.Load.addr, Ity_V128/*xfer*/);
4284 addInstr(env, PPCInstr_AvLdSt( True/*load*/, 16, v_dst, am_addr));
4292 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4293 HReg dst = newVRegV(env);
4294 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, arg));
4299 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4300 HReg zero = newVRegV(env);
4301 HReg dst = newVRegV(env);
4302 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
4303 addInstr(env, PPCInstr_AvBin8x16(Pav_CMPEQU, dst, arg, zero));
4304 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
4309 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4310 HReg zero = newVRegV(env);
4311 HReg dst = newVRegV(env);
4312 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
4313 addInstr(env, PPCInstr_AvBin16x8(Pav_CMPEQU, dst, arg, zero));
4314 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
4319 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4320 HReg zero = newVRegV(env);
4321 HReg dst = newVRegV(env);
4322 addInstr(env, PPCInstr_AvBinary(Pav_XOR, zero, zero, zero));
4323 addInstr(env, PPCInstr_AvBin32x4(Pav_CMPEQU, dst, arg, zero));
4324 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
4340 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
4341 HReg dst = newVRegV(env);
4342 addInstr(env, PPCInstr_AvUn32Fx4(fpop, dst, arg));
4348 HReg r_src = iselWordExpr_R(env, e->Iex.Unop.arg);
4349 HReg dst = newVRegV(env);
4351 sub_from_sp( env, 32 ); // Move SP down
4354 r_aligned16 = get_sp_aligned16( env );
4361 r_zeros = newVRegI(env);
4362 addInstr(env, PPCInstr_LI(r_zeros, 0x0, mode64));
4363 addInstr(env, PPCInstr_Store( 4, am_off0, r_zeros, mode64 ));
4364 addInstr(env, PPCInstr_Store( 4, am_off4, r_zeros, mode64 ));
4365 addInstr(env, PPCInstr_Store( 4, am_off8, r_zeros, mode64 ));
4368 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, mode64 ));
4371 addInstr(env, PPCInstr_AvLdSt( True/*ld*/, 4, dst, am_off12 ));
4373 add_to_sp( env, 32 ); // Reset SP
4380 return mk_AvDuplicateRI(env, e->Iex.Unop.arg);
4394 HReg dst = newVRegV(env);
4396 sub_from_sp( env, 32 ); // Move SP down
4399 r_aligned16 = get_sp_aligned16( env );
4406 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
4407 addInstr(env, PPCInstr_Store( 4, am_off12, r0, mode64 ));
4408 addInstr(env, PPCInstr_Store( 4, am_off8, r1, mode64 ));
4410 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
4411 addInstr(env, PPCInstr_Store( 4, am_off4, r2, mode64 ));
4412 addInstr(env, PPCInstr_Store( 4, am_off0, r3, mode64 ));
4415 addInstr(env, PPCInstr_AvLdSt(True/*ld*/, 16, dst, am_off0));
4417 add_to_sp( env, 32 ); // Reset SP
4420 HReg rHi = iselWordExpr_R(env, e->Iex.Binop.arg1);
4421 HReg rLo = iselWordExpr_R(env, e->Iex.Binop.arg2);
4422 HReg dst = newVRegV(env);
4426 sub_from_sp( env, 32 ); // Move SP down
4429 r_aligned16 = get_sp_aligned16( env );
4434 addInstr(env, PPCInstr_Store( 8, am_off0, rHi, mode64 ));
4435 addInstr(env, PPCInstr_Store( 8, am_off8, rLo, mode64 ));
4438 addInstr(env, PPCInstr_AvLdSt(True/*ld*/, 16, dst, am_off0));
4440 add_to_sp( env, 32 ); // Reset SP
4455 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
4456 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
4457 HReg dst = newVRegV(env);
4458 addInstr(env, PPCInstr_AvBin32Fx4(fpop, dst, argL, argR));
4463 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
4464 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
4465 HReg dst = newVRegV(env);
4471 HReg isNanLR = newVRegV(env);
4472 HReg isNanL = isNan(env, argL);
4473 HReg isNanR = isNan(env, argR);
4474 addInstr(env, PPCInstr_AvBinary(Pav_OR, isNanLR,
4477 addInstr(env, PPCInstr_AvBin32Fx4(Pavfp_CMPGTF, dst,
4479 addInstr(env, PPCInstr_AvBinary(Pav_OR, dst, dst, isNanLR));
4480 addInstr(env, PPCInstr_AvUnary(Pav_NOT, dst, dst));
4488 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
4489 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
4490 HReg dst = newVRegV(env);
4491 addInstr(env, PPCInstr_AvBinary(op, dst, arg1, arg2));
4519 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
4520 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
4521 HReg dst = newVRegV(env);
4522 addInstr(env, PPCInstr_AvBin8x16(op, dst, arg1, arg2));
4553 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
4554 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
4555 HReg dst = newVRegV(env);
4556 addInstr(env, PPCInstr_AvBin16x8(op, dst, arg1, arg2));
4585 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
4586 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
4587 HReg dst = newVRegV(env);
4588 addInstr(env, PPCInstr_AvBin32x4(op, dst, arg1, arg2));
4595 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
4596 HReg dst = newVRegV(env);
4597 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
4598 addInstr(env, PPCInstr_AvBin8x16(op, dst, r_src, v_shft));
4606 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
4607 HReg dst = newVRegV(env);
4608 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
4609 addInstr(env, PPCInstr_AvBin16x8(op, dst, r_src, v_shft));
4617 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
4618 HReg dst = newVRegV(env);
4619 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
4620 addInstr(env, PPCInstr_AvBin32x4(op, dst, r_src, v_shft));
4627 HReg dst = newVRegV(env);
4628 HReg r_src = iselVecExpr(env, e->Iex.Binop.arg1);
4629 HReg v_shft = mk_AvDuplicateRI(env, e->Iex.Binop.arg2);
4631 addInstr(env, PPCInstr_AvBinary(op, dst, r_src, v_shft));
4636 HReg dst = newVRegV(env);
4637 HReg v_src = iselVecExpr(env, e->Iex.Binop.arg1);
4638 HReg v_ctl = iselVecExpr(env, e->Iex.Binop.arg2);
4639 addInstr(env, PPCInstr_AvPerm(dst, v_src, v_src, v_ctl));
4651 return generate_zeroes_V128(env);
4654 return generate_ones_V128(env);
4660 env->hwcaps));
4670 static void iselStmt ( ISelEnv* env, IRStmt* stmt )
4672 Bool mode64 = env->mode64;
4683 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
4684 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
4697 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
4698 HReg r_src = iselWordExpr_R(env, stmt->Ist.Store.data);
4699 addInstr(env, PPCInstr_Store( toUChar(sizeofIRType(tyd)),
4705 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
4706 HReg fr_src = iselDblExpr(env, stmt->Ist.Store.data);
4707 addInstr(env,
4713 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
4714 HReg fr_src = iselFltExpr(env, stmt->Ist.Store.data);
4715 addInstr(env,
4721 = iselWordExpr_AMode(env, stmt->Ist.Store.addr, tyd/*of xfer*/);
4722 HReg v_src = iselVecExpr(env, stmt->Ist.Store.data);
4723 addInstr(env,
4732 HReg r_addr = iselWordExpr_R(env, stmt->Ist.Store.addr);
4733 iselInt64Expr( &rHi32, &rLo32, env, stmt->Ist.Store.data );
4734 addInstr(env, PPCInstr_Store( 4/*byte-store*/,
4738 addInstr(env, PPCInstr_Store( 4/*byte-store*/,
4749 IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
4752 HReg r_src = iselWordExpr_R(env, stmt->Ist.Put.data);
4755 addInstr(env, PPCInstr_Store( toUChar(sizeofIRType(ty)),
4763 PPCAMode* am_addr4 = advance4(env, am_addr);
4764 iselInt64Expr(&rHi,&rLo, env, stmt->Ist.Put.data);
4765 addInstr(env, PPCInstr_Store( 4, am_addr, rHi, mode64 ));
4766 addInstr(env, PPCInstr_Store( 4, am_addr4, rLo, mode64 ));
4772 HReg v_src = iselVecExpr(env, stmt->Ist.Put.data);
4775 addInstr(env,
4780 HReg fr_src = iselDblExpr(env, stmt->Ist.Put.data);
4783 addInstr(env, PPCInstr_FpLdSt( False/*store*/, 8,
4788 HReg fr_src = iselDfp64Expr( env, stmt->Ist.Put.data );
4791 addInstr( env, PPCInstr_FpLdSt( False/*store*/, 8, fr_src, am_addr ) );
4803 env, puti->descr,
4805 IRType ty = typeOfIRExpr(env->type_env, puti->data);
4807 HReg r_src = iselWordExpr_R(env, puti->data);
4808 addInstr(env, PPCInstr_Store( toUChar(8),
4813 HReg r_src = iselWordExpr_R(env, puti->data);
4814 addInstr(env, PPCInstr_Store( toUChar(4),
4824 IRType ty = typeOfIRTemp(env->type_env, tmp);
4827 HReg r_dst = lookupIRTemp(env, tmp);
4828 HReg r_src = iselWordExpr_R(env, stmt->Ist.WrTmp.data);
4829 addInstr(env, mk_iMOVds_RR( r_dst, r_src ));
4835 iselInt64Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data);
4836 lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp);
4837 addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) );
4838 addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) );
4843 iselInt128Expr(&r_srcHi,&r_srcLo, env, stmt->Ist.WrTmp.data);
4844 lookupIRTempPair( &r_dstHi, &r_dstLo, env, tmp);
4845 addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) );
4846 addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) );
4855 env, stmt->Ist.WrTmp.data);
4858 &r_dstLo, env, tmp);
4860 addInstr(env, mk_iMOVds_RR(r_dstHi, r_srcHi) );
4861 addInstr(env, mk_iMOVds_RR(r_dstMedHi, r_srcMedHi) );
4862 addInstr(env, mk_iMOVds_RR(r_dstMedLo, r_srcMedLo) );
4863 addInstr(env, mk_iMOVds_RR(r_dstLo, r_srcLo) );
4867 PPCCondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data);
4868 HReg r_dst = lookupIRTemp(env, tmp);
4869 addInstr(env, PPCInstr_Set(cond, r_dst));
4873 HReg fr_dst = lookupIRTemp(env, tmp);
4874 HReg fr_src = iselDblExpr(env, stmt->Ist.WrTmp.data);
4875 addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src));
4879 HReg fr_dst = lookupIRTemp(env, tmp);
4880 HReg fr_src = iselFltExpr(env, stmt->Ist.WrTmp.data);
4881 addInstr(env, PPCInstr_FpUnary(Pfp_MOV, fr_dst, fr_src));
4885 HReg v_dst = lookupIRTemp(env, tmp);
4886 HReg v_src = iselVecExpr(env, stmt->Ist.WrTmp.data);
4887 addInstr(env, PPCInstr_AvUnary(Pav_MOV, v_dst, v_src));
4891 HReg fr_dst = lookupIRTemp( env, tmp );
4892 HReg fr_src = iselDfp64Expr( env, stmt->Ist.WrTmp.data );
4893 addInstr( env, PPCInstr_Dfp64Unary( Pfp_MOV, fr_dst, fr_src ) );
4898 // lookupDfp128IRTempPair( &fr_dstHi, &fr_dstLo, env, tmp );
4899 lookupIRTempPair( &fr_dstHi, &fr_dstLo, env, tmp );
4900 iselDfp128Expr( &fr_srcHi, &fr_srcLo, env, stmt->Ist.WrTmp.data );
4901 addInstr( env, PPCInstr_Dfp64Unary( Pfp_MOV, fr_dstHi, fr_srcHi ) );
4902 addInstr( env, PPCInstr_Dfp64Unary( Pfp_MOV, fr_dstLo, fr_srcLo ) );
4911 IRType tyRes = typeOfIRTemp(env->type_env, res);
4912 IRType tyAddr = typeOfIRExpr(env->type_env, stmt->Ist.LLSC.addr);
4923 HReg r_addr = iselWordExpr_R( env, stmt->Ist.LLSC.addr );
4924 HReg r_dst = lookupIRTemp(env, res);
4926 addInstr(env, PPCInstr_LoadL( 4, r_dst, r_addr, mode64 ));
4930 addInstr(env, PPCInstr_LoadL( 8, r_dst, r_addr, mode64 ));
4936 HReg r_res = lookupIRTemp(env, res); /* :: Ity_I1 */
4937 HReg r_a = iselWordExpr_R(env, stmt->Ist.LLSC.addr);
4938 HReg r_src = iselWordExpr_R(env, stmt->Ist.LLSC.storedata);
4939 HReg r_tmp = newVRegI(env);
4940 IRType tyData = typeOfIRExpr(env->type_env,
4944 addInstr(env, PPCInstr_StoreC( tyData==Ity_I32 ? 4 : 8,
4946 addInstr(env, PPCInstr_MfCR( r_tmp ));
4947 addInstr(env, PPCInstr_Shft(
4949 env->mode64 ? False : True
4957 addInstr(env, PPCInstr_Alu(
4980 doHelperCall( env, passBBP, d->guard, d->cee, d->args );
4987 retty = typeOfIRTemp(env->type_env, d->tmp);
4992 lookupIRTempPair( &r_dstHi, &r_dstLo, env, d->tmp);
4993 addInstr(env, mk_iMOVds_RR(r_dstHi, hregPPC_GPR3(mode64)));
4994 addInstr(env, mk_iMOVds_RR(r_dstLo, hregPPC_GPR4(mode64)));
5001 HReg r_dst = lookupIRTemp(env, d->tmp);
5002 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
5012 addInstr(env, PPCInstr_MFence());
5043 PPCCondCode cc = iselCondCode(env, stmt->Ist.Exit.guard);
5051 if (env->chainingAllowed) {
5057 ? (((Addr64)stmt->Ist.Exit.dst->Ico.U64) > (Addr64)env->max_ga)
5058 : (((Addr32)stmt->Ist.Exit.dst->Ico.U32) > (Addr32)env->max_ga);
5060 addInstr(env, PPCInstr_XDirect(
5068 HReg r = iselWordExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
5069 addInstr(env, PPCInstr_XAssisted(r, amCIA, cc, Ijk_Boring));
5087 HReg r = iselWordExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
5088 addInstr(env, PPCInstr_XAssisted(r, amCIA, cc,
5112 static void iselNext ( ISelEnv* env,
5128 vassert(cdst->tag == (env->mode64 ? Ico_U64 :Ico_U32));
5131 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5132 if (env->chainingAllowed) {
5137 = env->mode64
5138 ? (((Addr64)cdst->Ico.U64) > (Addr64)env->max_ga)
5139 : (((Addr32)cdst->Ico.U32) > (Addr32)env->max_ga);
5141 addInstr(env, PPCInstr_XDirect(
5142 env->mode64 ? (Addr64)cdst->Ico.U64
5149 HReg r = iselWordExpr_R(env, next);
5150 addInstr(env, PPCInstr_XAssisted(r, amCIA, always,
5160 HReg r = iselWordExpr_R(env, next);
5161 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5162 if (env->chainingAllowed) {
5163 addInstr(env, PPCInstr_XIndir(r, amCIA, always));
5165 addInstr(env, PPCInstr_XAssisted(r, amCIA, always,
5187 HReg r = iselWordExpr_R(env, next);
5188 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5189 addInstr(env, PPCInstr_XAssisted(r, amCIA, always, jk));
5222 ISelEnv* env;
5248 env = LibVEX_Alloc(sizeof(ISelEnv));
5249 env->vreg_ctr = 0;
5252 env->mode64 = mode64;
5255 env->code = newHInstrArray();
5257 /* Copy BB's type env. */
5258 env->type_env = bb->tyenv;
5266 env->n_vregmap = bb->tyenv->types_used;
5267 env->vregmapLo = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
5268 env->vregmapMedLo = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
5270 env->vregmapMedHi = NULL;
5271 env->vregmapHi = NULL;
5273 env->vregmapMedHi = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
5274 env->vregmapHi = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
5278 env->chainingAllowed = chainingAllowed;
5279 env->max_ga = max_ga;
5280 env->hwcaps = hwcaps_host;
5281 env->previous_rm = NULL;
5282 env->vbi = vbi;
5287 for (i = 0; i < env->n_vregmap; i++) {
5320 env->vregmapLo[i] = hregLo;
5321 env->vregmapMedLo[i] = hregMedLo;
5323 env->vregmapMedHi[i] = hregMedHi;
5324 env->vregmapHi[i] = hregHi;
5327 env->vreg_ctr = j;
5332 addInstr(env, PPCInstr_EvCheck(amCounter, amFailAddr));
5339 addInstr(env, PPCInstr_ProfInc());
5344 iselStmt(env, bb->stmts[i]);
5346 iselNext(env, bb->next, bb->jumpkind, bb->offsIP);
5349 env->code->n_vregs = env->vreg_ctr;
5350 return env->code;
