Lines Matching refs:env
193 static HReg lookupIRTemp ( ISelEnv* env, IRTemp tmp )
196 vassert(tmp < env->n_vregmap);
197 return env->vregmap[tmp];
200 static void lookupIRTemp64 ( HReg* vrHI, HReg* vrLO, ISelEnv* env, IRTemp tmp )
203 vassert(tmp < env->n_vregmap);
204 vassert(env->vregmapHI[tmp] != INVALID_HREG);
205 *vrLO = env->vregmap[tmp];
206 *vrHI = env->vregmapHI[tmp];
209 static void addInstr ( ISelEnv* env, X86Instr* instr )
211 addHInstr(env->code, instr);
218 static HReg newVRegI ( ISelEnv* env )
220 HReg reg = mkHReg(env->vreg_ctr, HRcInt32, True/*virtual reg*/);
221 env->vreg_ctr++;
225 static HReg newVRegF ( ISelEnv* env )
227 HReg reg = mkHReg(env->vreg_ctr, HRcFlt64, True/*virtual reg*/);
228 env->vreg_ctr++;
232 static HReg newVRegV ( ISelEnv* env )
234 HReg reg = mkHReg(env->vreg_ctr, HRcVec128, True/*virtual reg*/);
235 env->vreg_ctr++;
250 static X86RMI* iselIntExpr_RMI_wrk ( ISelEnv* env, IRExpr* e );
251 static X86RMI* iselIntExpr_RMI ( ISelEnv* env, IRExpr* e );
253 static X86RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e );
254 static X86RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e );
256 static X86RM* iselIntExpr_RM_wrk ( ISelEnv* env, IRExpr* e );
257 static X86RM* iselIntExpr_RM ( ISelEnv* env, IRExpr* e );
259 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e );
260 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e );
262 static X86AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e );
263 static X86AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e );
266 ISelEnv* env, IRExpr* e );
268 ISelEnv* env, IRExpr* e );
270 static X86CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e );
271 static X86CondCode iselCondCode ( ISelEnv* env, IRExpr* e );
273 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e );
274 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e );
276 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e );
277 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e );
279 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e );
280 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e );
308 static void add_to_esp ( ISelEnv* env, Int n )
311 addInstr(env,
315 static void sub_from_esp ( ISelEnv* env, Int n )
318 addInstr(env,
345 static Int pushArg ( ISelEnv* env, IRExpr* arg )
347 IRType arg_ty = typeOfIRExpr(env->type_env, arg);
349 addInstr(env, X86Instr_Push(iselIntExpr_RMI(env, arg)));
354 iselInt64Expr(&rHi, &rLo, env, arg);
355 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
356 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
368 void callHelperAndClearArgs ( ISelEnv* env, X86CondCode cc,
376 addInstr(env, X86Instr_Call( cc, toUInt(Ptr_to_ULong(cee->addr)),
379 add_to_esp(env, 4*n_arg_ws);
405 void doHelperCall ( ISelEnv* env,
478 n_arg_ws += pushArg(env, args[i]);
521 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32);
522 tmpregs[argreg] = iselIntExpr_R(env, args[i]);
528 addInstr( env, mk_iMOVsd_RR( tmpregs[argregX], argregs[argregX] ) );
537 vassert(typeOfIRExpr(env->type_env, args[i]) == Ity_I32);
538 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
539 iselIntExpr_RMI(env, args[i]),
549 addInstr(env, mk_iMOVsd_RR( hregX86_EBP(), argregs[0]));
559 addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
581 cc = iselCondCode( env, guard );
586 callHelperAndClearArgs( env, cc, cee, n_arg_ws );
595 X86AMode* genGuestArrayOffset ( ISelEnv* env, IRRegArray* descr,
624 tmp = newVRegI(env);
625 roff = iselIntExpr_R(env, off);
626 addInstr(env, mk_iMOVsd_RR(roff, tmp));
628 addInstr(env,
631 addInstr(env,
641 void set_FPU_rounding_default ( ISelEnv* env )
648 addInstr(env, X86Instr_Push(X86RMI_Imm(DEFAULT_FPUCW)));
649 addInstr(env, X86Instr_FpLdCW(zero_esp));
650 add_to_esp(env, 4);
660 void set_FPU_rounding_mode ( ISelEnv* env, IRExpr* mode )
662 HReg rrm = iselIntExpr_R(env, mode);
663 HReg rrm2 = newVRegI(env);
674 addInstr(env, mk_iMOVsd_RR(rrm, rrm2));
675 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(3), rrm2));
676 addInstr(env, X86Instr_Sh32(Xsh_SHL, 10, rrm2));
677 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Imm(DEFAULT_FPUCW), rrm2));
678 addInstr(env, X86Instr_Push(X86RMI_Reg(rrm2)));
679 addInstr(env, X86Instr_FpLdCW(zero_esp));
680 add_to_esp(env, 4);
688 static HReg do_sse_Not128 ( ISelEnv* env, HReg src )
690 HReg dst = newVRegV(env);
693 addInstr(env, X86Instr_SseReRg(Xsse_XOR, dst, dst));
695 addInstr(env, X86Instr_Sse32Fx4(Xsse_CMPEQF, dst, dst));
697 addInstr(env, X86Instr_SseReRg(Xsse_XOR, src, dst));
710 static void roundToF64 ( ISelEnv* env, HReg reg )
713 sub_from_esp(env, 8);
714 addInstr(env, X86Instr_FpLdSt(False/*store*/, 8, reg, zero_esp));
715 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, reg, zero_esp));
716 add_to_esp(env, 8);
738 static HReg iselIntExpr_R ( ISelEnv* env, IRExpr* e )
740 HReg r = iselIntExpr_R_wrk(env, e);
751 static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
755 IRType ty = typeOfIRExpr(env->type_env,e);
762 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
767 HReg dst = newVRegI(env);
768 X86AMode* amode = iselIntExpr_AMode ( env, e->Iex.Load.addr );
775 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
780 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
784 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
797 HReg junk = newVRegF(env);
798 HReg dst = newVRegI(env);
799 HReg srcL = iselDblExpr(env, triop->arg2);
800 HReg srcR = iselDblExpr(env, triop->arg3);
803 addInstr(env, X86Instr_FpBinary(
810 addInstr(env, X86Instr_FpStSW_AX());
811 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
812 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0x4700), dst));
826 HReg dst = newVRegI(env);
827 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg2);
828 addInstr(env, mk_iMOVsd_RR(reg,dst));
829 addInstr(env, X86Instr_Unary32(Xun_NEG,dst));
853 HReg dst = newVRegI(env);
854 HReg reg = iselIntExpr_R(env, e->Iex.Binop.arg1);
855 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
856 addInstr(env, mk_iMOVsd_RR(reg,dst));
857 addInstr(env, X86Instr_Alu32R(aluOp, rmi, dst));
890 HReg dst = newVRegI(env);
893 HReg regL = iselIntExpr_R(env, e->Iex.Binop.arg1);
894 addInstr(env, mk_iMOVsd_RR(regL,dst));
899 addInstr(env, X86Instr_Alu32R(
903 addInstr(env, X86Instr_Alu32R(
907 addInstr(env, X86Instr_Sh32(Xsh_SHL, 24, dst));
908 addInstr(env, X86Instr_Sh32(Xsh_SAR, 24, dst));
911 addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, dst));
912 addInstr(env, X86Instr_Sh32(Xsh_SAR, 16, dst));
927 addInstr(env, X86Instr_Sh32( shOp, nshift, dst ));
930 HReg regR = iselIntExpr_R(env, e->Iex.Binop.arg2);
931 addInstr(env, mk_iMOVsd_RR(regR,hregX86_ECX()));
932 addInstr(env, X86Instr_Sh32(shOp, 0/* %cl */, dst));
940 HReg src1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
941 HReg dst = newVRegI(env);
942 HReg src2 = iselIntExpr_R(env, e->Iex.Binop.arg2);
943 addInstr(env, mk_iMOVsd_RR(src1,dst));
944 addInstr(env, X86Instr_Alu32R(Xalu_CMP, X86RMI_Reg(src2), dst));
945 addInstr(env, X86Instr_CMov32(Xcc_B, X86RM_Reg(src2), dst));
950 HReg hi8 = newVRegI(env);
951 HReg lo8 = newVRegI(env);
952 HReg hi8s = iselIntExpr_R(env, e->Iex.Binop.arg1);
953 HReg lo8s = iselIntExpr_R(env, e->Iex.Binop.arg2);
954 addInstr(env, mk_iMOVsd_RR(hi8s, hi8));
955 addInstr(env, mk_iMOVsd_RR(lo8s, lo8));
956 addInstr(env, X86Instr_Sh32(Xsh_SHL, 8, hi8));
957 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFF), lo8));
958 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo8), hi8));
963 HReg hi16 = newVRegI(env);
964 HReg lo16 = newVRegI(env);
965 HReg hi16s = iselIntExpr_R(env, e->Iex.Binop.arg1);
966 HReg lo16s = iselIntExpr_R(env, e->Iex.Binop.arg2);
967 addInstr(env, mk_iMOVsd_RR(hi16s, hi16));
968 addInstr(env, mk_iMOVsd_RR(lo16s, lo16));
969 addInstr(env, X86Instr_Sh32(Xsh_SHL, 16, hi16));
970 addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0xFFFF), lo16));
971 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(lo16), hi16));
977 HReg a16 = newVRegI(env);
978 HReg b16 = newVRegI(env);
979 HReg a16s = iselIntExpr_R(env, e->Iex.Binop.arg1);
980 HReg b16s = iselIntExpr_R(env, e->Iex.Binop.arg2);
988 addInstr(env, mk_iMOVsd_RR(a16s, a16));
989 addInstr(env, mk_iMOVsd_RR(b16s, b16));
990 addInstr(env, X86Instr_Sh32(Xsh_SHL, shift, a16));
991 addInstr(env, X86Instr_Sh32(Xsh_SHL, shift, b16));
992 addInstr(env, X86Instr_Sh32(shr_op, shift, a16));
993 addInstr(env, X86Instr_Sh32(shr_op, shift, b16));
994 addInstr(env, X86Instr_Alu32R(Xalu_MUL, X86RMI_Reg(a16), b16));
999 HReg fL = iselDblExpr(env, e->Iex.Binop.arg1);
1000 HReg fR = iselDblExpr(env, e->Iex.Binop.arg2);
1001 HReg dst = newVRegI(env);
1002 addInstr(env, X86Instr_FpCmp(fL,fR,dst));
1005 addInstr(env, X86Instr_Sh32(Xsh_SHR, 8, dst));
1012 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
1013 HReg dst = newVRegI(env);
1025 sub_from_esp(env, 4);
1028 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
1031 addInstr(env, X86Instr_FpLdStI(False/*store*/,
1036 addInstr(env, X86Instr_LoadEX(2,False,zero_esp,dst));
1040 addInstr(env, X86Instr_Alu32R(
1045 set_FPU_rounding_default( env );
1048 add_to_esp(env, 4);
1065 HReg dst = newVRegI(env);
1066 HReg src = iselIntExpr_R(env, expr32);
1067 addInstr(env, mk_iMOVsd_RR(src,dst) );
1068 addInstr(env, X86Instr_Alu32R(Xalu_AND,
1081 HReg dst = newVRegI(env);
1082 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1083 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1095 HReg dst = newVRegI(env);
1096 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1097 addInstr(env, X86Instr_LoadEX(1,True,amode,dst));
1109 HReg dst = newVRegI(env);
1110 X86AMode* amode = iselIntExpr_AMode ( env, mi.bindee[0] );
1111 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1122 dst = newVRegI(env);
1125 addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1136 dst = newVRegI(env);
1139 addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1148 HReg dst = newVRegI(env);
1149 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1151 addInstr(env, mk_iMOVsd_RR(src,dst) );
1152 addInstr(env, X86Instr_Alu32R(Xalu_AND,
1159 HReg dst = newVRegI(env);
1160 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1162 addInstr(env, mk_iMOVsd_RR(src,dst) );
1163 addInstr(env, X86Instr_Sh32(Xsh_SHL, amt, dst));
1164 addInstr(env, X86Instr_Sh32(Xsh_SAR, amt, dst));
1170 HReg dst = newVRegI(env);
1171 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1172 addInstr(env, mk_iMOVsd_RR(src,dst) );
1173 addInstr(env, X86Instr_Unary32(Xun_NOT,dst));
1178 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1183 iselInt64Expr(&rHi,&rLo, env, e->Iex.Unop.arg);
1188 HReg dst = newVRegI(env);
1189 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1191 addInstr(env, mk_iMOVsd_RR(src,dst) );
1192 addInstr(env, X86Instr_Sh32(Xsh_SHR, shift, dst));
1197 HReg dst = newVRegI(env);
1198 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1199 addInstr(env, X86Instr_Set32(cond,dst));
1206 HReg dst = newVRegI(env);
1207 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
1208 addInstr(env, X86Instr_Set32(cond,dst));
1209 addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, dst));
1210 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, dst));
1215 HReg dst = newVRegI(env);
1216 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1217 addInstr(env, X86Instr_Bsfr32(True,src,dst));
1224 HReg tmp = newVRegI(env);
1225 HReg dst = newVRegI(env);
1226 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1227 addInstr(env, X86Instr_Bsfr32(False,src,tmp));
1228 addInstr(env, X86Instr_Alu32R(Xalu_MOV,
1230 addInstr(env, X86Instr_Alu32R(Xalu_SUB,
1236 HReg dst = newVRegI(env);
1237 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1238 addInstr(env, mk_iMOVsd_RR(src,dst));
1239 addInstr(env, X86Instr_Unary32(Xun_NEG,dst));
1240 addInstr(env, X86Instr_Alu32R(Xalu_OR,
1242 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, dst));
1248 HReg dst = newVRegI(env);
1249 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
1250 addInstr(env, mk_iMOVsd_RR(src, dst));
1251 addInstr(env, X86Instr_Unary32(Xun_NEG, dst));
1252 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(src), dst));
1257 HReg dst = newVRegI(env);
1258 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
1260 sub_from_esp(env, 16);
1261 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp0));
1262 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(esp0), dst ));
1263 add_to_esp(env, 16);
1272 HReg rf = iselFltExpr(env, e->Iex.Unop.arg);
1273 HReg dst = newVRegI(env);
1276 set_FPU_rounding_default(env);
1278 sub_from_esp(env, 8);
1280 addInstr(env,
1283 addInstr(env,
1286 add_to_esp(env, 8);
1294 return iselIntExpr_R(env, e->Iex.Unop.arg);
1305 HReg dst = newVRegI(env);
1306 addInstr(env, X86Instr_Alu32R(
1314 HReg dst = newVRegI(env);
1315 addInstr(env, X86Instr_LoadEX(
1328 env, e->Iex.GetI.descr,
1330 HReg dst = newVRegI(env);
1332 addInstr(env, X86Instr_LoadEX( 1, False, am, dst ));
1336 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), dst));
1344 HReg dst = newVRegI(env);
1353 doHelperCall( env, False, NULL, e->Iex.CCall.cee, e->Iex.CCall.args );
1355 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
1362 X86RMI* rmi = iselIntExpr_RMI ( env, e );
1363 HReg r = newVRegI(env);
1364 addInstr(env, X86Instr_Alu32R(Xalu_MOV, rmi, r));
1371 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
1373 HReg rX = iselIntExpr_R(env, e->Iex.Mux0X.exprX);
1374 X86RM* r0 = iselIntExpr_RM(env, e->Iex.Mux0X.expr0);
1375 HReg dst = newVRegI(env);
1376 addInstr(env, mk_iMOVsd_RR(rX,dst));
1377 r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
1378 addInstr(env, X86Instr_Test32(0xFF, r8));
1379 addInstr(env, X86Instr_CMov32(Xcc_Z,r0,dst));
1426 static X86AMode* iselIntExpr_AMode ( ISelEnv* env, IRExpr* e )
1428 X86AMode* am = iselIntExpr_AMode_wrk(env, e);
1434 static X86AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e )
1436 IRType ty = typeOfIRExpr(env->type_env,e);
1456 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1->Iex.Binop.arg1);
1457 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg1
1472 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1473 HReg r2 = iselIntExpr_R(env, e->Iex.Binop.arg2->Iex.Binop.arg1 );
1483 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1490 HReg r1 = iselIntExpr_R(env, e);
1501 static X86RMI* iselIntExpr_RMI ( ISelEnv* env, IRExpr* e )
1503 X86RMI* rmi = iselIntExpr_RMI_wrk(env, e);
1521 static X86RMI* iselIntExpr_RMI_wrk ( ISelEnv* env, IRExpr* e )
1523 IRType ty = typeOfIRExpr(env->type_env,e);
1547 X86AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr);
1553 HReg r = iselIntExpr_R ( env, e );
1564 static X86RI* iselIntExpr_RI ( ISelEnv* env, IRExpr* e )
1566 X86RI* ri = iselIntExpr_RI_wrk(env, e);
1581 static X86RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e )
1583 IRType ty = typeOfIRExpr(env->type_env,e);
1600 HReg r = iselIntExpr_R ( env, e );
1611 static X86RM* iselIntExpr_RM ( ISelEnv* env, IRExpr* e )
1613 X86RM* rm = iselIntExpr_RM_wrk(env, e);
1629 static X86RM* iselIntExpr_RM_wrk ( ISelEnv* env, IRExpr* e )
1631 IRType ty = typeOfIRExpr(env->type_env,e);
1644 HReg r = iselIntExpr_R ( env, e );
1656 static X86CondCode iselCondCode ( ISelEnv* env, IRExpr* e )
1659 return iselCondCode_wrk(env,e);
1663 static X86CondCode iselCondCode_wrk ( ISelEnv* env, IRExpr* e )
1668 vassert(typeOfIRExpr(env->type_env,e) == Ity_I1);
1672 HReg r32 = lookupIRTemp(env, e->Iex.RdTmp.tmp);
1674 addInstr(env, X86Instr_Test32(1,X86RM_Reg(r32)));
1684 r = newVRegI(env);
1685 addInstr(env, X86Instr_Alu32R(Xalu_MOV,X86RMI_Imm(0),r));
1686 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(r),r));
1693 return 1 ^ iselCondCode(env, e->Iex.Unop.arg);
1700 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1701 addInstr(env, X86Instr_Test32(1,rm));
1710 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1711 addInstr(env, X86Instr_Test32(0xFF,rm));
1720 X86RM* rm = iselIntExpr_RM(env, e->Iex.Unop.arg);
1721 addInstr(env, X86Instr_Test32(0xFFFF,rm));
1733 HReg r0 = iselIntExpr_R(env, mi.bindee[0]);
1734 X86RMI* rmi1 = iselIntExpr_RMI(env, mi.bindee[1]);
1735 HReg tmp = newVRegI(env);
1736 addInstr(env, mk_iMOVsd_RR(r0, tmp));
1737 addInstr(env, X86Instr_Alu32R(Xalu_AND,rmi1,tmp));
1748 HReg r0 = iselIntExpr_R(env, mi.bindee[0]);
1749 X86RMI* rmi1 = iselIntExpr_RMI(env, mi.bindee[1]);
1750 HReg tmp = newVRegI(env);
1751 addInstr(env, mk_iMOVsd_RR(r0, tmp));
1752 addInstr(env, X86Instr_Alu32R(Xalu_OR,rmi1,tmp));
1763 addInstr(env, X86Instr_Alu32M(Xalu_CMP, X86RI_Imm(0), am));
1770 HReg r1 = iselIntExpr_R(env, e->Iex.Unop.arg);
1772 addInstr(env, X86Instr_Alu32R(Xalu_CMP,rmi2,r1));
1785 HReg tmp = newVRegI(env);
1786 iselInt64Expr( &hi1, &lo1, env, mi.bindee[0] );
1787 addInstr(env, mk_iMOVsd_RR(hi1, tmp));
1788 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo1),tmp));
1789 iselInt64Expr( &hi2, &lo2, env, mi.bindee[1] );
1790 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(hi2),tmp));
1791 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo2),tmp));
1800 HReg tmp = newVRegI(env);
1801 iselInt64Expr( &hi, &lo, env, e->Iex.Unop.arg );
1802 addInstr(env, mk_iMOVsd_RR(hi, tmp));
1803 addInstr(env, X86Instr_Alu32R(Xalu_OR,X86RMI_Reg(lo), tmp));
1816 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1817 addInstr(env, X86Instr_Test32(0xFF,X86RM_Reg(r1)));
1824 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1825 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
1826 HReg r = newVRegI(env);
1827 addInstr(env, mk_iMOVsd_RR(r1,r));
1828 addInstr(env, X86Instr_Alu32R(Xalu_XOR,rmi2,r));
1829 addInstr(env, X86Instr_Test32(0xFF,X86RM_Reg(r)));
1844 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1845 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
1846 HReg r = newVRegI(env);
1847 addInstr(env, mk_iMOVsd_RR(r1,r));
1848 addInstr(env, X86Instr_Alu32R(Xalu_XOR,rmi2,r));
1849 addInstr(env, X86Instr_Test32(0xFFFF,X86RM_Reg(r)));
1869 doHelperCall( env, False, NULL, cal->Iex.CCall.cee, cal->Iex.CCall.args );
1870 addInstr(env, X86Instr_Alu32R(Xalu_CMP,
1886 HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
1887 X86RMI* rmi2 = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
1888 addInstr(env, X86Instr_Alu32R(Xalu_CMP,rmi2,r1));
1905 HReg tHi = newVRegI(env);
1906 HReg tLo = newVRegI(env);
1907 iselInt64Expr( &hi1, &lo1, env, e->Iex.Binop.arg1 );
1908 iselInt64Expr( &hi2, &lo2, env, e->Iex.Binop.arg2 );
1909 addInstr(env, mk_iMOVsd_RR(hi1, tHi));
1910 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(hi2), tHi));
1911 addInstr(env, mk_iMOVsd_RR(lo1, tLo));
1912 addInstr(env, X86Instr_Alu32R(Xalu_XOR,X86RMI_Reg(lo2), tLo));
1913 addInstr(env
1935 static void iselInt64Expr ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
1937 iselInt64Expr_wrk(rHi, rLo, env, e);
1948 static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
1953 vassert(typeOfIRExpr(env->type_env,e) == Ity_I64);
1960 HReg tLo = newVRegI(env);
1961 HReg tHi = newVRegI(env);
1965 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wLo), tLo));
1969 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wHi), tHi));
1970 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(wLo), tLo));
1979 lookupIRTemp64( rHi, rLo, env, e->Iex.RdTmp.tmp);
1988 tLo = newVRegI(env);
1989 tHi = newVRegI(env);
1990 am0 = iselIntExpr_AMode(env, e->Iex.Load.addr);
1992 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am0), tLo ));
1993 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2003 HReg tLo = newVRegI(env);
2004 HReg tHi = newVRegI(env);
2005 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am), tLo ));
2006 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2015 = genGuestArrayOffset( env, e->Iex.GetI.descr,
2018 HReg tLo = newVRegI(env);
2019 HReg tHi = newVRegI(env);
2020 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am), tLo ));
2021 addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(am4), tHi ));
2031 HReg tLo = newVRegI(env);
2032 HReg tHi = newVRegI(env);
2034 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.Mux0X.expr0);
2035 r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
2036 addInstr(env, mk_iMOVsd_RR( e0Hi, tHi ) );
2037 addInstr(env, mk_iMOVsd_RR( e0Lo, tLo ) );
2038 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
2039 addInstr(env, X86Instr_Test32(0xFF, r8));
2040 addInstr(env, X86Instr_CMov32(Xcc_NZ,X86RM_Mem(zero_esp),tHi));
2041 addInstr(env, X86Instr_CMov32(Xcc_NZ,X86RM_Mem(zero_esp),tLo));
2042 add_to_esp(env, 4);
2051 HReg tLo = newVRegI(env);
2052 HReg tHi = newVRegI(env);
2054 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.Mux0X.exprX);
2055 r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
2056 addInstr(env, mk_iMOVsd_RR( e0Hi, tHi ) );
2057 addInstr(env, mk_iMOVsd_RR( e0Lo, tLo ) );
2058 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
2059 addInstr(env, X86Instr_Test32(0xFF, r8));
2060 addInstr(env, X86Instr_CMov32(Xcc_Z,X86RM_Mem(zero_esp),tHi));
2061 addInstr(env, X86Instr_CMov32(Xcc_Z,X86RM_Mem(zero_esp),tLo));
2062 add_to_esp(env, 4);
2072 HReg tLo = newVRegI(env);
2073 HReg tHi = newVRegI(env);
2074 iselInt64Expr(&e0Hi, &e0Lo, env, e->Iex.Mux0X.expr0);
2075 iselInt64Expr(&eXHi, &eXLo, env, e->Iex.Mux0X.exprX);
2076 addInstr(env, mk_iMOVsd_RR(eXHi, tHi));
2077 addInstr(env, mk_iMOVsd_RR(eXLo, tLo));
2078 r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
2079 addInstr(env, X86Instr_Test32(0xFF, r8));
2082 addInstr(env, X86Instr_CMov32(Xcc_Z,X86RM_Reg(e0Hi),tHi));
2083 addInstr(env, X86Instr_CMov32(Xcc_Z,X86RM_Reg(e0Lo),tLo));
2098 HReg tLo = newVRegI(env);
2099 HReg tHi = newVRegI(env);
2101 X86RM* rmLeft = iselIntExpr_RM(env, e->Iex.Binop.arg1);
2102 HReg rRight = iselIntExpr_R(env, e->Iex.Binop.arg2);
2103 addInstr(env, mk_iMOVsd_RR(rRight, hregX86_EAX()));
2104 addInstr(env, X86Instr_MulL(syned, rmLeft));
2106 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2107 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2119 HReg tLo = newVRegI(env);
2120 HReg tHi = newVRegI(env);
2122 X86RM* rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2);
2123 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2124 addInstr(env, mk_iMOVsd_RR(sHi, hregX86_EDX()));
2125 addInstr(env, mk_iMOVsd_RR(sLo, hregX86_EAX()));
2126 addInstr(env, X86Instr_Div(syned, rmRight));
2127 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2128 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2139 HReg tLo = newVRegI(env);
2140 HReg tHi = newVRegI(env);
2144 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2145 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2146 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2147 addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yHi), tHi));
2148 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2149 addInstr(env, X86Instr_Alu32R(op, X86RMI_Reg(yLo), tLo));
2162 HReg tLo = newVRegI(env);
2163 HReg tHi = newVRegI(env);
2166 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2167 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2168 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2169 addInstr(env, X86Instr_Alu32R(Xalu_ADD, X86RMI_Imm(wLo), tLo));
2170 addInstr(env, X86Instr_Alu32R(Xalu_ADC, X86RMI_Imm(wHi), tHi));
2178 HReg tLo = newVRegI(env);
2179 HReg tHi = newVRegI(env);
2180 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2181 addInstr(env, mk_iMOVsd_RR(xHi, tHi));
2182 addInstr(env, mk_iMOVsd_RR(xLo, tLo));
2183 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2185 addInstr(env, X86Instr_Alu32R(Xalu_ADD, X86RMI_Reg(yLo), tLo));
2186 addInstr(env, X86Instr_Alu32R(Xalu_ADC, X86RMI_Reg(yHi), tHi));
2188 addInstr(env, X86Instr_Alu32R(Xalu_SUB, X86RMI_Reg(yLo), tLo));
2189 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(yHi), tHi));
2198 *rHi = iselIntExpr_R(env, e->Iex.Binop.arg1);
2199 *rLo = iselIntExpr_R(env, e->Iex.Binop.arg2);
2224 tLo = newVRegI(env);
2225 tHi = newVRegI(env);
2226 tTemp = newVRegI(env);
2227 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2);
2228 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2229 addInstr(env, mk_iMOVsd_RR(rAmt, hregX86_ECX()));
2230 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2231 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2234 addInstr(env, X86Instr_Sh3232(Xsh_SHL, 0/*%cl*/, tLo, tHi));
2235 addInstr(env, X86Instr_Sh32(Xsh_SHL, 0/*%cl*/, tLo));
2236 addInstr(env, X86Instr_Test32(32, X86RM_Reg(hregX86_ECX())));
2237 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tLo), tHi));
2238 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tTemp));
2239 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tTemp), tLo));
2266 tLo = newVRegI(env);
2267 tHi = newVRegI(env);
2268 tTemp = newVRegI(env);
2269 rAmt = iselIntExpr_R(env, e->Iex.Binop.arg2);
2270 iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
2271 addInstr(env, mk_iMOVsd_RR(rAmt, hregX86_ECX()));
2272 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2273 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2276 addInstr(env, X86Instr_Sh3232(Xsh_SHR, 0/*%cl*/, tHi, tLo));
2277 addInstr(env, X86Instr_Sh32(Xsh_SHR, 0/*%cl*/, tHi));
2278 addInstr(env, X86Instr_Test32(32, X86RM_Reg(hregX86_ECX())));
2279 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tHi), tLo));
2280 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tTemp));
2281 addInstr(env, X86Instr_CMov32(Xcc_NZ, X86RM_Reg(tTemp), tHi));
2292 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
2293 HReg tLo = newVRegI(env);
2294 HReg tHi = newVRegI(env);
2310 sub_from_esp(env, 8);
2313 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2316 addInstr(env, X86Instr_FpLdStI(False/*store*/, 8, rf, zero_esp));
2320 addInstr(env, X86Instr_Alu32R(
2322 addInstr(env, X86Instr_Alu32R(
2326 env );
2329 add_to_esp(env, 8);
2442 HReg tLo = newVRegI(env);
2443 HReg tHi = newVRegI(env);
2444 iselInt64Expr(&yHi, &yLo, env, e->Iex.Binop.arg2);
2445 addInstr(env, X86Instr_Push(X86RMI_Reg(yHi)));
2446 addInstr(env, X86Instr_Push(X86RMI_Reg(yLo)));
2447 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2448 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2449 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2450 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn, 0 ));
2451 add_to_esp(env, 4*4);
2452 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2453 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2482 HReg tLo = newVRegI(env);
2483 HReg tHi = newVRegI(env);
2484 X86RMI* y = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
2485 addInstr(env, X86Instr_Push(y));
2486 iselInt64Expr(&xHi, &xLo, env, e->Iex.Binop.arg1);
2487 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2488 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2489 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn, 0 ));
2490 add_to_esp(env, 3*4);
2491 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2492 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2510 HReg tLo = newVRegI(env);
2511 HReg tHi = newVRegI(env);
2512 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2513 addInstr(env, mk_iMOVsd_RR(src,tHi));
2514 addInstr(env, mk_iMOVsd_RR(src,tLo));
2515 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tHi));
2523 HReg tLo = newVRegI(env);
2524 HReg tHi = newVRegI(env);
2525 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2526 addInstr(env, mk_iMOVsd_RR(src,tLo));
2527 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2535 HReg tLo = newVRegI(env);
2536 HReg tHi = newVRegI(env);
2537 HReg src = iselIntExpr_R(env, e->Iex.Unop.arg);
2538 addInstr(env, mk_iMOVsd_RR(src,tLo));
2539 addInstr(env, X86Instr_Alu32R(Xalu_AND,
2541 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2551 HReg tLo = newVRegI(env);
2552 HReg tHi = newVRegI(env);
2553 HReg vec = iselVecExpr(env, e->Iex.Unop.arg);
2557 sub_from_esp(env, 16);
2558 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp0));
2559 addInstr(env, X86Instr_Alu32R( Xalu_MOV,
2561 addInstr(env, X86Instr_Alu32R( Xalu_MOV,
2563 add_to_esp(env, 16);
2571 HReg tLo = newVRegI(env);
2572 HReg tHi = newVRegI(env);
2573 X86CondCode cond = iselCondCode(env, e->Iex.Unop.arg);
2574 addInstr(env, X86Instr_Set32(cond,tLo));
2575 addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, tLo));
2576 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tLo));
2577 addInstr(env, mk_iMOVsd_RR(tLo, tHi));
2585 HReg tLo = newVRegI(env);
2586 HReg tHi = newVRegI(env);
2588 iselInt64Expr(&sHi, &sLo, env, e->Iex.Unop.arg);
2589 addInstr(env, mk_iMOVsd_RR(sHi, tHi));
2590 addInstr(env, mk_iMOVsd_RR(sLo, tLo));
2591 addInstr(env, X86Instr_Unary32(Xun_NOT,tHi));
2592 addInstr(env, X86Instr_Unary32(Xun_NOT,tLo));
2601 HReg tLo = newVRegI(env);
2602 HReg tHi = newVRegI(env);
2604 iselInt64Expr(&yHi, &yLo, env, e->Iex.Unop.arg);
2606 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tLo));
2607 addInstr(env, X86Instr_Alu32R(Xalu_SUB, X86RMI_Reg(yLo), tLo));
2609 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Imm(0), tHi));
2610 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(yHi), tHi));
2614 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(yLo), tLo));
2615 addInstr(env, X86Instr_Alu32R(Xalu_OR, X86RMI_Reg(yHi), tHi));
2632 HReg xBoth = newVRegI(env);
2633 HReg merged = newVRegI(env);
2634 HReg tmp2 = newVRegI(env);
2636 iselInt64Expr(&xHi,&xLo, env, mi.bindee[0]);
2637 addInstr(env, mk_iMOVsd_RR(xHi,xBoth));
2638 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2641 iselInt64Expr(&yHi,&yLo, env, mi.bindee[1]);
2642 addInstr(env, mk_iMOVsd_RR(yHi,merged));
2643 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2645 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2649 addInstr(env, mk_iMOVsd_RR(merged,tmp2));
2650 addInstr(env, X86Instr_Unary32(Xun_NEG,tmp2));
2651 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2653 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tmp2));
2660 HReg tmp1 = newVRegI(env);
2661 HReg tmp2 = newVRegI(env);
2663 iselInt64Expr(&srcHi, &srcLo, env, e->Iex.Unop.arg);
2665 addInstr(env, mk_iMOVsd_RR(srcHi,tmp1));
2666 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2669 addInstr(env, mk_iMOVsd_RR(tmp1,tmp2));
2670 addInstr(env, X86Instr_Unary32(Xun_NEG,tmp2));
2671 addInstr(env, X86Instr_Alu32R(Xalu_OR,
2673 addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, tmp2));
2684 HReg rf = iselDblExpr(env, e->Iex.Unop.arg);
2685 HReg tLo = newVRegI(env);
2686 HReg tHi = newVRegI(env);
2690 set_FPU_rounding_default(env);
2692 sub_from_esp(env, 8);
2694 addInstr(env,
2697 addInstr(env,
2700 addInstr(env,
2703 add_to_esp(env, 8);
2722 HReg tLo = newVRegI(env);
2723 HReg tHi = newVRegI(env);
2724 iselInt64Expr(&xHi, &xLo, env, e->Iex.Unop.arg);
2725 addInstr(env, X86Instr_Push(X86RMI_Reg(xHi)));
2726 addInstr(env, X86Instr_Push(X86RMI_Reg(xLo)));
2727 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (UInt)fn, 0 ));
2728 add_to_esp(env, 2*4);
2729 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2730 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2744 HReg tLo = newVRegI(env);
2745 HReg tHi = newVRegI(env);
2748 doHelperCall( env, False, NULL, e->Iex.CCall.cee, e->Iex.CCall.args );
2750 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(), tHi));
2751 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), tLo));
2769 static HReg iselFltExpr ( ISelEnv* env, IRExpr* e )
2771 HReg r = iselFltExpr_wrk( env, e );
2781 static HReg iselFltExpr_wrk ( ISelEnv* env, IRExpr* e )
2783 IRType ty = typeOfIRExpr(env->type_env,e);
2787 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
2792 HReg res = newVRegF(env);
2794 am = iselIntExpr_AMode(env, e->Iex.Load.addr);
2795 addInstr(env, X86Instr_FpLdSt(True/*load*/, 4, res, am));
2804 HReg dst = newVRegF(env);
2805 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
2806 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2807 addInstr(env, X86Instr_Fp64to32(src,dst));
2808 set_FPU_rounding_default( env );
2815 HReg res = newVRegF(env);
2816 addInstr(env, X86Instr_FpLdSt( True/*load*/, 4, res, am ));
2824 HReg dst = newVRegF(env);
2825 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Unop.arg);
2827 addInstr(env, X86Instr_Push(rmi));
2828 addInstr(env, X86Instr_FpLdSt(
2831 add_to_esp(env, 4);
2836 HReg rf = iselFltExpr(env, e->Iex.Binop.arg2);
2837 HReg dst = newVRegF(env);
2843 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
2846 addInstr(env, X86Instr_FpUnary(Xfp_ROUND, rf, dst));
2849 set_FPU_rounding_default( env );
2886 static HReg iselDblExpr ( ISelEnv* env, IRExpr* e )
2888 HReg r = iselDblExpr_wrk( env, e );
2898 static HReg iselDblExpr_wrk ( ISelEnv* env, IRExpr* e )
2900 IRType ty = typeOfIRExpr(env->type_env,e);
2905 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
2910 HReg freg = newVRegF(env);
2925 addInstr(env, X86Instr_Push(X86RMI_Imm(u.u32x2[1])));
2926 addInstr(env, X86Instr_Push(X86RMI_Imm(u.u32x2[0])));
2927 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, freg,
2929 add_to_esp(env, 8);
2935 HReg res = newVRegF(env);
2937 am = iselIntExpr_AMode(env, e->Iex.Load.addr);
2938 addInstr(env, X86Instr_FpLdSt(True/*load*/, 8, res, am));
2945 HReg res = newVRegF(env);
2946 addInstr(env, X86Instr_FpLdSt( True/*load*/, 8, res, am ));
2953 env, e->Iex.GetI.descr,
2955 HReg res = newVRegF(env);
2956 addInstr(env, X86Instr_FpLdSt( True/*load*/, 8, res, am ));
2977 HReg res = newVRegF(env);
2978 HReg srcL = iselDblExpr(env, triop->arg2);
2979 HReg srcR = iselDblExpr(env, triop->arg3);
2982 addInstr(env, X86Instr_FpBinary(fpop,srcL,srcR,res));
2985 roundToF64(env, res);
2991 HReg rf = iselDblExpr(env, e->Iex.Binop.arg2);
2992 HReg dst = newVRegF(env);
2998 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3001 addInstr(env, X86Instr_FpUnary(Xfp_ROUND, rf, dst));
3004 set_FPU_rounding_default( env );
3010 HReg dst = newVRegF(env);
3012 iselInt64Expr( &rHi, &rLo, env, e->Iex.Binop.arg2);
3013 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3014 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3017 set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
3019 addInstr(env, X86Instr_FpLdStI(
3024 set_FPU_rounding_default( env );
3026 add_to_esp(env, 8);
3041 HReg res = newVRegF(env);
3042 HReg src = iselDblExpr(env, e->Iex.Binop.arg2);
3045 addInstr(env, X86Instr_FpUnary(fpop,src,res));
3048 roundToF64(env, res);
3061 HReg res = newVRegF(env);
3062 HReg src = iselDblExpr(env, e->Iex.Unop.arg);
3063 addInstr(env, X86Instr_FpUnary(fpop,src,res));
3065 roundToF64(env, res);
3073 HReg dst = newVRegF(env);
3074 HReg ri = iselIntExpr_R(env, e->Iex.Unop.arg);
3075 addInstr(env, X86Instr_Push(X86RMI_Reg(ri)));
3076 set_FPU_rounding_default(env);
3077 addInstr(env, X86Instr_FpLdStI(
3080 add_to_esp(env, 4);
3086 HReg dst = newVRegF(env);
3088 iselInt64Expr( &rHi, &rLo, env, e->Iex.Unop.arg);
3090 set_FPU_rounding_default(env);
3091 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3092 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3093 addInstr(env, X86Instr_FpLdSt(
3096 add_to_esp(env, 8);
3101 HReg res = iselFltExpr(env, e->Iex.Unop.arg);
3112 && typeOfIRExpr(env->type_env,e->Iex.Mux0X.cond) == Ity_I8) {
3113 X86RM* r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
3114 HReg rX = iselDblExpr(env, e->Iex.Mux0X.exprX);
3115 HReg r0 = iselDblExpr(env, e->Iex.Mux0X.expr0);
3116 HReg dst = newVRegF(env);
3117 addInstr(env, X86Instr_FpUnary(Xfp_MOV,rX,dst));
3118 addInstr(env, X86Instr_Test32(0xFF, r8));
3119 addInstr(env, X86Instr_FpCMov(Xcc_Z,r0,dst));
3133 static HReg iselVecExpr ( ISelEnv* env, IRExpr* e )
3135 HReg r = iselVecExpr_wrk( env, e );
3146 static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
3150 do { if (env->hwcaps == 0/*baseline, no sse*/) \
3155 do { if (0 == (env->hwcaps & VEX_HWCAPS_X86_SSE2)) \
3160 (env->hwcaps & VEX_HWCAPS_X86_SSE2)
3166 IRType ty = typeOfIRExpr(env->type_env,e);
3173 return lookupIRTemp(env, e->Iex.RdTmp.tmp);
3177 HReg dst = newVRegV(env);
3178 addInstr(env, X86Instr_SseLdSt(
3188 HReg dst = newVRegV(env);
3189 X86AMode* am = iselIntExpr_AMode(env, e->Iex.Load.addr);
3190 addInstr(env, X86Instr_SseLdSt( True/*load*/, dst, am ));
3195 HReg dst = newVRegV(env);
3197 addInstr(env, X86Instr_SseConst(e->Iex.Const.con->Ico.V128, dst));
3210 X86AMode* am = iselIntExpr_AMode(env, mi.bindee[0]);
3211 HReg dst = newVRegV(env);
3212 addInstr(env, X86Instr_SseLdzLO(8, dst, am));
3220 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3221 return do_sse_Not128(env, arg);
3240 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3241 HReg tmp = newVRegV(env);
3242 HReg dst = newVRegV(env);
3244 addInstr(env, X86Instr_SseReRg(Xsse_XOR, tmp, tmp));
3245 addInstr(env, X86Instr_SseReRg(Xsse_CMPEQ32, arg, tmp));
3246 tmp = do_sse_Not128(env
3247 addInstr(env, X86Instr_SseShuf(0xB1, tmp, dst));
3248 addInstr(env, X86Instr_SseReRg(Xsse_OR, tmp, dst));
3263 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3264 HReg dst = newVRegV(env);
3265 HReg r32 = newVRegI(env);
3266 sub_from_esp(env, 16);
3267 addInstr(env, X86Instr_SseLdSt(False/*store*/, arg, esp0));
3270 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), r32));
3271 addInstr(env, X86Instr_Unary32(Xun_NEG, r32));
3272 addInstr(env, X86Instr_Alu32R(Xalu_SBB, X86RMI_Reg(r32), r32));
3273 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r32), am));
3275 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3276 add_to_esp(env, 16);
3284 HReg vec0 = newVRegV(env);
3285 HReg vec1 = newVRegV(env);
3286 HReg dst = newVRegV(env);
3291 addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec0, vec0));
3292 addInstr(env, mk_vMOVsd_RR(vec0, vec1));
3293 addInstr(env, X86Instr_Sse32Fx4(Xsse_CMPEQF, vec1, vec1));
3296 arg = iselVecExpr(env, e->Iex.Unop.arg);
3298 addInstr(env, mk_vMOVsd_RR(arg, dst));
3300 addInstr(env, X86Instr_SseReRg(cmpOp, vec0, dst));
3302 addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec1, dst));
3311 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3312 HReg dst = newVRegV(env);
3313 addInstr(env, X86Instr_Sse32Fx4(op, arg, dst));
3322 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3323 HReg dst = newVRegV(env);
3325 addInstr(env, X86Instr_Sse64Fx2(op, arg, dst));
3340 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3341 HReg dst = newVRegV(env);
3342 addInstr(env, mk_vMOVsd_RR(arg, dst));
3343 addInstr(env, X86Instr_Sse32FLo(op, arg, dst));
3358 HReg arg = iselVecExpr(env, e->Iex.Unop.arg);
3359 HReg dst = newVRegV(env);
3361 addInstr(env, mk_vMOVsd_RR(arg, dst));
3362 addInstr(env, X86Instr_Sse64FLo(op, arg, dst));
3367 HReg dst = newVRegV(env);
3369 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Unop.arg);
3370 addInstr(env, X86Instr_Push(rmi));
3371 addInstr(env, X86Instr_SseLdzLO(4, dst, esp0));
3372 add_to_esp(env, 4);
3378 HReg dst = newVRegV(env);
3380 iselInt64Expr(&rHi, &rLo, env, e->Iex.Unop.arg);
3381 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
3382 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
3383 addInstr(env, X86Instr_SseLdzLO(8, dst, esp0));
3384 add_to_esp(env, 8);
3397 HReg dst = newVRegV(env);
3398 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1);
3399 HReg srcI = iselIntExpr_R(env, e->Iex.Binop.arg2);
3401 sub_from_esp(env, 16);
3402 addInstr(env, X86Instr_SseLdSt(False/*store*/, srcV, esp0));
3403 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcI), esp0));
3404 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3405 add_to_esp(env, 16);
3410 HReg dst = newVRegV(env);
3411 HReg srcV = iselVecExpr(env, e->Iex.Binop.arg1);
3415 iselInt64Expr(&srcIhi, &srcIlo, env, e->Iex.Binop.arg2);
3416 sub_from_esp(env, 16);
3417 addInstr(env, X86Instr_SseLdSt(False/*store*/, srcV, esp0));
3418 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcIlo), esp0));
3419 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(srcIhi), esp4));
3420 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3421 add_to_esp(env, 16);
3431 HReg dst = newVRegV(env);
3433 sub_from_esp(env, 16);
3435 iselInt64Expr(&r1, &r0, env, e->Iex.Binop.arg2);
3436 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r0), esp0));
3437 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r1), esp4));
3439 iselInt64Expr(&r3, &r2, env, e->Iex.Binop.arg1);
3440 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r2), esp8));
3441 addInstr(env, X86Instr_Alu32M(Xalu_MOV, X86RI_Reg(r3), esp12));
3443 addInstr(env, X86Instr_SseLdSt(True/*load*/, dst, esp0));
3444 add_to_esp(env, 16);
3460 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3461 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3462 HReg dst = newVRegV(env);
3463 addInstr(env, mk_vMOVsd_RR(argL, dst));
3464 addInstr(env, X86Instr_Sse32Fx4(op, argR, dst));
3480 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3481 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3482 HReg dst = newVRegV(env);
3484 addInstr(env, mk_vMOVsd_RR(argL, dst));
3485 addInstr(env, X86Instr_Sse64Fx2(op, argR, dst));
3500 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3501 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3502 HReg dst = newVRegV(env);
3503 addInstr(env, mk_vMOVsd_RR(argL, dst));
3504 addInstr(env, X86Instr_Sse32FLo(op, argR, dst));
3519 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3520 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3521 HReg dst = newVRegV(env);
3523 addInstr(env, mk_vMOVsd_RR(argL, dst));
3524 addInstr(env, X86Instr_Sse64FLo(op, argR, dst));
3588 HReg arg1 = iselVecExpr(env, e->Iex.Binop.arg1);
3589 HReg arg2 = iselVecExpr(env, e->Iex.Binop.arg2);
3590 HReg dst = newVRegV(env);
3594 addInstr(env, mk_vMOVsd_RR(arg2, dst));
3595 addInstr(env, X86Instr_SseReRg(op, arg1, dst));
3597 addInstr(env, mk_vMOVsd_RR(arg1, dst));
3598 addInstr(env, X86Instr_SseReRg(op, arg2, dst));
3612 HReg greg = iselVecExpr(env, e->Iex.Binop.arg1);
3613 X86RMI* rmi = iselIntExpr_RMI(env, e->Iex.Binop.arg2);
3615 env);
3616 HReg dst = newVRegV(env);
3618 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3619 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3620 addInstr(env, X86Instr_Push(X86RMI_Imm(0)));
3621 addInstr(env, X86Instr_Push(rmi));
3622 addInstr(env, X86Instr_SseLdSt(True/*load*/, ereg, esp0));
3623 addInstr(env, mk_vMOVsd_RR(greg, dst));
3624 addInstr(env, X86Instr_SseReRg(op, ereg, dst));
3625 add_to_esp(env, 16);
3639 HReg dst = newVRegV(env);
3640 HReg argL = iselVecExpr(env, e->Iex.Binop.arg1);
3641 HReg argR = iselVecExpr(env, e->Iex.Binop.arg2);
3642 HReg argp = newVRegI(env);
3644 sub_from_esp(env, 112);
3646 addInstr(env, X86Instr_Lea32(X86AMode_IR(48, hregX86_ESP()),
3649 addInstr(env, X86Instr_Alu32R(Xalu_AND,
3657 addInstr(env, X86Instr_Lea32(X86AMode_IR(0, argp),
3659 addInstr(env, X86Instr_Lea32(X86AMode_IR(16, argp),
3661 addInstr(env, X86Instr_Lea32(X86AMode_IR(32, argp),
3667 addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argL,
3669 addInstr(env, X86Instr_SseLdSt(False/*!isLoad*/, argR,
3672 addInstr(env, X86Instr_Call( Xcc_ALWAYS, (Addr32)fn, 3 ));
3675 addInstr(env, X86Instr_SseLdSt(True/*isLoad*/, dst,
3678 add_to_esp(env, 112);
3688 X86RM* r8 = iselIntExpr_RM(env, e->Iex.Mux0X.cond);
3689 HReg rX = iselVecExpr(env, e->Iex.Mux0X.exprX);
3690 HReg r0 = iselVecExpr(env, e->Iex.Mux0X.expr0);
3691 HReg dst = newVRegV(env);
3692 addInstr(env, mk_vMOVsd_RR(rX,dst));
3693 addInstr(env, X86Instr_Test32(0xFF, r8));
3694 addInstr(env, X86Instr_SseCMov(Xcc_Z,r0,dst));
3700 LibVEX_ppVexHwCaps(VexArchX86,env->hwcaps));
3714 static void iselStmt ( ISelEnv* env, IRStmt* stmt )
3726 IRType tya = typeOfIRExpr(env->type_env, stmt->Ist.Store.addr);
3727 IRType tyd = typeOfIRExpr(env->type_env, stmt->Ist.Store.data);
3734 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3735 X86RI* ri = iselIntExpr_RI(env, stmt->Ist.Store.data);
3736 addInstr(env, X86Instr_Alu32M(Xalu_MOV,ri,am));
3740 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3741 HReg r = iselIntExpr_R(env, stmt->Ist.Store.data);
3742 addInstr(env, X86Instr_Store( toUChar(tyd==Ity_I8 ? 1 : 2),
3747 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3748 HReg r = iselDblExpr(env, stmt->Ist.Store.data);
3749 addInstr(env, X86Instr_FpLdSt(False/*store*/, 8, r, am));
3753 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3754 HReg r = iselFltExpr(env, stmt->Ist.Store.data);
3755 addInstr(env, X86Instr_FpLdSt(False/*store*/, 4, r, am));
3760 iselInt64Expr(&vHi, &vLo, env, stmt->Ist.Store.data);
3761 rA = iselIntExpr_R(env, stmt->Ist.Store.addr);
3762 addInstr(env, X86Instr_Alu32M(
3764 addInstr(env, X86Instr_Alu32M(
3769 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.Store.addr);
3770 HReg r = iselVecExpr(env, stmt->Ist.Store.data);
3771 addInstr(env, X86Instr_SseLdSt(False/*store*/, r, am));
3779 IRType ty = typeOfIRExpr(env->type_env, stmt->Ist.Put.data);
3783 X86RI* ri = iselIntExpr_RI(env, stmt->Ist.Put.data);
3784 addInstr(env,
3793 HReg r = iselIntExpr_R(env, stmt->Ist.Put.data);
3794 addInstr(env, X86Instr_Store(
3805 iselInt64Expr(&vHi, &vLo, env, stmt->Ist.Put.data);
3806 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(vLo), am ));
3807 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(vHi), am4 ));
3811 HReg vec = iselVecExpr(env, stmt->Ist.Put.data);
3813 addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, am));
3817 HReg f32 = iselFltExpr(env, stmt->Ist.Put.data);
3819 set_FPU_rounding_default(env); /* paranoia */
3820 addInstr(env, X86Instr_FpLdSt( False/*store*/, 4, f32, am ));
3824 HReg f64 = iselDblExpr(env, stmt->Ist.Put.data);
3826 set_FPU_rounding_default(env); /* paranoia */
3827 addInstr(env, X86Instr_FpLdSt( False/*store*/, 8, f64, am ));
3839 env, puti->descr,
3842 IRType ty = typeOfIRExpr(env->type_env, puti->data);
3844 HReg val = iselDblExpr(env, puti->data);
3845 addInstr(env, X86Instr_FpLdSt( False/*store*/, 8, val, am ));
3849 HReg r = iselIntExpr_R(env, puti->data);
3850 addInstr(env, X86Instr_Store( 1, r, am ));
3854 HReg r = iselIntExpr_R(env, puti->data);
3855 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(r), am ));
3861 iselInt64Expr(&rHi, &rLo, env, puti->data);
3862 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rLo), am ));
3863 addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(rHi), am4 ));
3872 IRType ty = typeOfIRTemp(env->type_env, tmp);
3883 X86AMode* am = iselIntExpr_AMode(env, stmt->Ist.WrTmp.data);
3884 HReg dst = lookupIRTemp(env, tmp);
3890 addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Reg(src), dst));
3892 addInstr(env, X86Instr_Lea32(am,dst));
3898 X86RMI* rmi = iselIntExpr_RMI(env, stmt->Ist.WrTmp.data);
3899 HReg dst = lookupIRTemp(env, tmp);
3900 addInstr(env, X86Instr_Alu32R(Xalu_MOV,rmi,dst));
3905 iselInt64Expr(&rHi,&rLo, env, stmt->Ist.WrTmp.data);
3906 lookupIRTemp64( &dstHi, &dstLo, env, tmp);
3907 addInstr(env, mk_iMOVsd_RR(rHi,dstHi) );
3908 addInstr(env, mk_iMOVsd_RR(rLo,dstLo) );
3912 X86CondCode cond = iselCondCode(env, stmt->Ist.WrTmp.data);
3913 HReg dst = lookupIRTemp(env, tmp);
3914 addInstr(env, X86Instr_Set32(cond, dst));
3918 HReg dst = lookupIRTemp(env, tmp);
3919 HReg src = iselDblExpr(env, stmt->Ist.WrTmp.data);
3920 addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst));
3924 HReg dst = lookupIRTemp(env, tmp);
3925 HReg src = iselFltExpr(env, stmt->Ist.WrTmp.data);
3926 addInstr(env, X86Instr_FpUnary(Xfp_MOV,src,dst));
3930 HReg dst = lookupIRTemp(env, tmp);
3931 HReg src = iselVecExpr(env, stmt->Ist.WrTmp.data);
3932 addInstr(env, mk_vMOVsd_RR(src,dst));
3950 doHelperCall( env, passBBP, d->guard, d->cee, d->args );
3957 retty = typeOfIRTemp(env->type_env, d->tmp);
3962 lookupIRTemp64( &dstHi, &dstLo, env, d->tmp);
3963 addInstr(env, mk_iMOVsd_RR(hregX86_EDX(),dstHi) );
3964 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dstLo) );
3970 HReg dst = lookupIRTemp(env, d->tmp);
3971 addInstr(env, mk_iMOVsd_RR(hregX86_EAX(),dst) );
3981 addInstr(env, X86Instr_MFence(env->hwcaps));
3994 IRType ty = typeOfIRExpr(env->type_env, cas->dataLo);
3996 X86AMode* am = iselIntExpr_AMode(env, cas->addr);
3997 HReg rDataLo = iselIntExpr_R(env, cas->dataLo);
3998 HReg rExpdLo = iselIntExpr_R(env, cas->expdLo);
3999 HReg rOldLo = lookupIRTemp(env, cas->oldLo);
4002 addInstr(env, mk_iMOVsd_RR(rExpdLo, rOldLo));
4003 addInstr(env, mk_iMOVsd_RR(rExpdLo, hregX86_EAX()));
4004 addInstr(env, mk_iMOVsd_RR(rDataLo, hregX86_EBX()));
4011 addInstr(env, X86Instr_ACAS(am, sz));
4012 addInstr(env,
4019 IRType ty = typeOfIRExpr(env->type_env, cas->dataLo);
4023 X86AMode* am = iselIntExpr_AMode(env, cas->addr);
4024 HReg rDataHi = iselIntExpr_R(env, cas->dataHi);
4025 HReg rDataLo = iselIntExpr_R(env, cas->dataLo);
4026 HReg rExpdHi = iselIntExpr_R(env, cas->expdHi);
4027 HReg rExpdLo = iselIntExpr_R(env, cas->expdLo);
4028 HReg rOldHi = lookupIRTemp(env, cas->oldHi);
4029 HReg rOldLo = lookupIRTemp(env, cas->oldLo);
4032 addInstr(env, mk_iMOVsd_RR(rExpdHi, rOldHi));
4033 addInstr(env, mk_iMOVsd_RR(rExpdLo, rOldLo));
4034 addInstr(env, mk_iMOVsd_RR(rExpdHi, hregX86_EDX()));
4035 addInstr(env, mk_iMOVsd_RR(rExpdLo, hregX86_EAX()));
4036 addInstr(env, mk_iMOVsd_RR(rDataHi, hregX86_ECX()));
4037 addInstr(env, mk_iMOVsd_RR(rDataLo, hregX86_EBX()));
4038 addInstr(env, X86Instr_DACAS(am));
4039 addInstr(env,
4042 addInstr(env,
4065 X86CondCode cc = iselCondCode(env, stmt->Ist.Exit.guard);
4071 if (env->chainingAllowed) {
4076 = ((Addr32)stmt->Ist.Exit.dst->Ico.U32) > env->max_ga;
4078 addInstr(env, X86Instr_XDirect(stmt->Ist.Exit.dst->Ico.U32,
4084 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
4085 addInstr(env, X86Instr_XAssisted(r, amEIP, cc, Ijk_Boring));
4107 HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
4108 addInstr(env, X86Instr_XAssisted(r, amEIP, cc, stmt->Ist.Exit.jk));
4131 static void iselNext ( ISelEnv* env,
4149 if (env->chainingAllowed) {
4154 = ((Addr64)cdst->Ico.U32) > env->max_ga;
4156 addInstr(env, X86Instr_XDirect(cdst->Ico.U32,
4163 HReg r = iselIntExpr_R(env, next);
4164 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS,
4174 HReg r = iselIntExpr_R(env, next);
4176 if (env->chainingAllowed) {
4177 addInstr(env, X86Instr_XIndir(r, amEIP, Xcc_ALWAYS));
4179 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS,
4205 HReg r = iselIntExpr_R(env, next);
4207 addInstr(env, X86Instr_XAssisted(r, amEIP, Xcc_ALWAYS, jk));
4241 ISelEnv* env;
4256 env = LibVEX_Alloc(sizeof(ISelEnv));
4257 env->vreg_ctr = 0;
4260 env->code = newHInstrArray();
4262 /* Copy BB's type env. */
4263 env->type_env = bb->tyenv;
4267 env->n_vregmap = bb->tyenv->types_used;
4268 env->vregmap = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
4269 env->vregmapHI = LibVEX_Alloc(env->n_vregmap * sizeof(HReg));
4272 env->chainingAllowed = chainingAllowed;
4273 env->hwcaps = hwcaps_host;
4274 env->max_ga = max_ga;
4279 for (i = 0; i < env->n_vregmap; i++) {
4294 env->vregmap[i] = hreg;
4295 env->vregmapHI[i] = hregHI;
4297 env->vreg_ctr = j;
4302 addInstr(env, X86Instr_EvCheck(amCounter, amFailAddr));
4309 addInstr(env, X86Instr_ProfInc());
4314 iselStmt(env, bb->stmts[i]);
4316 iselNext(env, bb->next, bb->jumpkind, bb->offsIP);
4319 env->code->n_vregs = env->vreg_ctr;
4320 return env->code;
