Lines Matching refs:vex_printf
50 case Ity_INVALID: vex_printf("Ity_INVALID"); break;
51 case Ity_I1: vex_printf( "I1"); break;
52 case Ity_I8: vex_printf( "I8"); break;
53 case Ity_I16: vex_printf( "I16"); break;
54 case Ity_I32: vex_printf( "I32"); break;
55 case Ity_I64: vex_printf( "I64"); break;
56 case Ity_I128: vex_printf( "I128"); break;
57 case Ity_F32: vex_printf( "F32"); break;
58 case Ity_F64: vex_printf( "F64"); break;
59 case Ity_F128: vex_printf( "F128"); break;
60 case Ity_D32: vex_printf( "D32"); break;
61 case Ity_D64: vex_printf( "D64"); break;
62 case Ity_D128: vex_printf( "D128"); break;
63 case Ity_V128: vex_printf( "V128"); break;
64 case Ity_V256: vex_printf( "V256"); break;
65 default: vex_printf("ty = 0x%x\n", (Int)ty);
75 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break;
76 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break;
77 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break;
78 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break;
79 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break;
81 vex_printf( "F32{0x%x}", u.i32);
83 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break;
85 vex_printf( "F64{0x%llx}", u.i64);
87 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
88 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
89 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
96 vex_printf("%s", ce->name);
98 vex_printf("[rp=%d]", ce->regparms);
100 vex_printf("[mcx=0x%x]", ce->mcx_mask);
101 vex_printf("{%p}", (void*)ce->addr);
106 vex_printf("(%d:%dx", arr->base, arr->nElems);
108 vex_printf(")");
114 vex_printf("IRTemp_INVALID");
116 vex_printf( "t%d", (Int)tmp);
153 case Iop_8Uto16: vex_printf("8Uto16"); return;
154 case Iop_8Uto32: vex_printf("8Uto32"); return;
155 case Iop_16Uto32: vex_printf("16Uto32"); return;
156 case Iop_8Sto16: vex_printf("8Sto16"); return;
157 case Iop_8Sto32: vex_printf("8Sto32"); return;
158 case Iop_16Sto32: vex_printf("16Sto32"); return;
159 case Iop_32Sto64: vex_printf("32Sto64"); return;
160 case Iop_32Uto64: vex_printf("32Uto64"); return;
161 case Iop_32to8: vex_printf("32to8"); return;
162 case Iop_16Uto64: vex_printf("16Uto64"); return;
163 case Iop_16Sto64: vex_printf("16Sto64"); return;
164 case Iop_8Uto64: vex_printf("8Uto64"); return;
165 case Iop_8Sto64: vex_printf("8Sto64"); return;
166 case Iop_64to16: vex_printf("64to16"); return;
167 case Iop_64to8: vex_printf("64to8"); return;
169 case Iop_Not1: vex_printf("Not1"); return;
170 case Iop_32to1: vex_printf("32to1"); return;
171 case Iop_64to1: vex_printf("64to1"); return;
172 case Iop_1Uto8: vex_printf("1Uto8"); return;
173 case Iop_1Uto32: vex_printf("1Uto32"); return;
174 case Iop_1Uto64: vex_printf("1Uto64"); return;
175 case Iop_1Sto8: vex_printf("1Sto8"); return;
176 case Iop_1Sto16: vex_printf("1Sto16"); return;
177 case Iop_1Sto32: vex_printf("1Sto32"); return;
178 case Iop_1Sto64: vex_printf("1Sto64"); return;
180 case Iop_MullS8: vex_printf("MullS8"); return;
181 case Iop_MullS16: vex_printf("MullS16"); return;
182 case Iop_MullS32: vex_printf("MullS32"); return;
183 case Iop_MullS64: vex_printf("MullS64"); return;
184 case Iop_MullU8: vex_printf("MullU8"); return;
185 case Iop_MullU16: vex_printf("MullU16"); return;
186 case Iop_MullU32: vex_printf("MullU32"); return;
187 case Iop_MullU64: vex_printf("MullU64"); return;
189 case Iop_Clz64: vex_printf("Clz64"); return;
190 case Iop_Clz32: vex_printf("Clz32"); return;
191 case Iop_Ctz64: vex_printf("Ctz64"); return;
192 case Iop_Ctz32: vex_printf("Ctz32"); return;
194 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
195 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
196 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
197 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
199 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
200 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
201 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
202 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
204 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return;
205 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
206 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
207 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
209 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
210 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
212 case Iop_Left8: vex_printf("Left8"); return;
213 case Iop_Left16: vex_printf("Left16"); return;
214 case Iop_Left32: vex_printf("Left32"); return;
215 case Iop_Left64: vex_printf("Left64"); return;
216 case Iop_Max32U: vex_printf("Max32U"); return;
218 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
219 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
221 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
222 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
224 case Iop_DivU32: vex_printf("DivU32"); return;
225 case Iop_DivS32: vex_printf("DivS32"); return;
226 case Iop_DivU64: vex_printf("DivU64"); return;
227 case Iop_DivS64: vex_printf("DivS64"); return;
228 case Iop_DivU64E: vex_printf("DivU64E"); return;
229 case Iop_DivS64E: vex_printf("DivS64E"); return;
230 case Iop_DivU32E: vex_printf("DivU32E"); return;
231 case Iop_DivS32E: vex_printf("DivS32E"); return;
233 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
234 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
236 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
237 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
239 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
241 case Iop_16HIto8: vex_printf("16HIto8"); return;
242 case Iop_16to8: vex_printf("16to8"); return;
243 case Iop_8HLto16: vex_printf("8HLto16"); return;
245 case Iop_32HIto16: vex_printf("32HIto16"); return;
246 case Iop_32to16: vex_printf("32to16"); return;
247 case Iop_16HLto32: vex_printf("16HLto32"); return;
249 case Iop_64HIto32: vex_printf("64HIto32"); return;
250 case Iop_64to32: vex_printf("64to32"); return;
251 case Iop_32HLto64: vex_printf("32HLto64"); return;
253 case Iop_128HIto64: vex_printf("128HIto64"); return;
254 case Iop_128to64: vex_printf("128to64"); return;
255 case Iop_64HLto128: vex_printf("64HLto128"); return;
257 case Iop_CmpF32: vex_printf("CmpF32"); return;
258 case Iop_F32toI16S: vex_printf("F32toI16S"); return;
259 case Iop_F32toI32S: vex_printf("F32toI32S"); return;
260 case Iop_F32toI64S: vex_printf("F32toI64S"); return;
261 case Iop_I16StoF32: vex_printf("I16StoF32"); return;
262 case Iop_I32StoF32: vex_printf("I32StoF32"); return;
263 case Iop_I64StoF32: vex_printf("I64StoF32"); return;
265 case Iop_AddF64: vex_printf("AddF64"); return;
266 case Iop_SubF64: vex_printf("SubF64"); return;
267 case Iop_MulF64: vex_printf("MulF64"); return;
268 case Iop_DivF64: vex_printf("DivF64"); return;
269 case Iop_AddF64r32: vex_printf("AddF64r32"); return;
270 case Iop_SubF64r32: vex_printf("SubF64r32"); return;
271 case Iop_MulF64r32: vex_printf("MulF64r32"); return;
272 case Iop_DivF64r32: vex_printf("DivF64r32"); return;
273 case Iop_AddF32: vex_printf("AddF32"); return;
274 case Iop_SubF32: vex_printf("SubF32"); return;
275 case Iop_MulF32: vex_printf("MulF32"); return;
276 case Iop_DivF32: vex_printf("DivF32"); return;
279 case Iop_AddF128: vex_printf("AddF128"); return;
280 case Iop_SubF128: vex_printf("SubF128"); return;
281 case Iop_MulF128: vex_printf("MulF128"); return;
282 case Iop_DivF128: vex_printf("DivF128"); return;
283 case Iop_AbsF128: vex_printf("AbsF128"); return;
284 case Iop_NegF128: vex_printf("NegF128"); return;
285 case Iop_SqrtF128: vex_printf("SqrtF128"); return;
286 case Iop_CmpF128: vex_printf("CmpF128"); return;
288 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
289 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
290 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
291 case Iop_I32StoF128: vex_printf("I32StoF128"); return;
292 case Iop_I64StoF128: vex_printf("I64StoF128"); return;
293 case Iop_F128toI32S: vex_printf("F128toI32S"); return;
294 case Iop_F128toI64S: vex_printf("F128toI64S"); return;
295 case Iop_F32toF128: vex_printf("F32toF128"); return;
296 case Iop_F64toF128: vex_printf("F64toF128"); return;
297 case Iop_F128toF64: vex_printf("F128toF64"); return;
298 case Iop_F128toF32: vex_printf("F128toF32"); return;
301 case Iop_MAddF32: vex_printf("s390_MAddF32"); return;
302 case Iop_MSubF32: vex_printf("s390_MSubF32"); return;
304 case Iop_ScaleF64: vex_printf("ScaleF64"); return;
305 case Iop_AtanF64: vex_printf("AtanF64"); return;
306 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return;
307 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return;
308 case Iop_PRemF64: vex_printf("PRemF64"); return;
309 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return;
310 case Iop_PRem1F64: vex_printf("PRem1F64"); return;
311 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
312 case Iop_NegF64: vex_printf("NegF64"); return;
313 case Iop_AbsF64: vex_printf("AbsF64"); return;
314 case Iop_NegF32: vex_printf("NegF32"); return;
315 case Iop_AbsF32: vex_printf("AbsF32"); return;
316 case Iop_SqrtF64: vex_printf("SqrtF64"); return;
317 case Iop_SqrtF32: vex_printf("SqrtF32"); return;
318 case Iop_SinF64: vex_printf("SinF64"); return;
319 case Iop_CosF64: vex_printf("CosF64"); return;
320 case Iop_TanF64: vex_printf("TanF64"); return;
321 case Iop_2xm1F64: vex_printf("2xm1F64"); return;
323 case Iop_MAddF64: vex_printf("MAddF64"); return;
324 case Iop_MSubF64: vex_printf("MSubF64"); return;
325 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
326 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
328 case Iop_Est5FRSqrt: vex_printf("Est5FRSqrt"); return;
329 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
330 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
331 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
332 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
334 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
335 case Iop_CalcFPRF: vex_printf("CalcFPRF"); return;
337 case Iop_QAdd32S: vex_printf("QAdd32S"); return;
338 case Iop_QSub32S: vex_printf("QSub32S"); return;
339 case Iop_Add16x2: vex_printf("Add16x2"); return;
340 case Iop_Sub16x2: vex_printf("Sub16x2"); return;
341 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
342 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
343 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
344 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
345 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
346 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
347 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
348 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
350 case Iop_Add8x4: vex_printf("Add8x4"); return;
351 case Iop_Sub8x4: vex_printf("Sub8x4"); return;
352 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
353 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
354 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
355 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
356 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
357 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
358 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
359 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
360 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return;
362 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
363 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return;
365 case Iop_CmpF64: vex_printf("CmpF64"); return;
367 case Iop_F64toI16S: vex_printf("F64toI16S"); return;
368 case Iop_F64toI32S: vex_printf("F64toI32S"); return;
369 vex_printf("F64toI64S"); return;
370 case Iop_F64toI64U: vex_printf("F64toI64U"); return;
372 case Iop_F64toI32U: vex_printf("F64toI32U"); return;
374 case Iop_I16StoF64: vex_printf("I16StoF64"); return;
375 case Iop_I32StoF64: vex_printf("I32StoF64"); return;
376 case Iop_I64StoF64: vex_printf("I64StoF64"); return;
377 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
378 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
380 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
382 case Iop_F32toF64: vex_printf("F32toF64"); return;
383 case Iop_F64toF32: vex_printf("F64toF32"); return;
385 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
386 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
387 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
389 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
390 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
391 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
392 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
394 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return;
395 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return;
397 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
398 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
400 case Iop_Rsqrte32Fx4: vex_printf("VRsqrte32Fx4"); return;
401 case Iop_Rsqrte32x4: vex_printf("VRsqrte32x4"); return;
402 case Iop_Rsqrte32Fx2: vex_printf("VRsqrte32Fx2"); return;
403 case Iop_Rsqrte32x2: vex_printf("VRsqrte32x2"); return;
405 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return;
406 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return;
408 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return;
409 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return;
411 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return;
412 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return;
414 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return;
415 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return;
417 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
418 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
419 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
420 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
422 case Iop_Abs8x8: vex_printf("Abs8x8"); return;
423 case Iop_Abs16x4: vex_printf("Abs16x4"); return;
424 case Iop_Abs32x2: vex_printf("Abs32x2"); return;
425 case Iop_Add8x8: vex_printf("Add8x8"); return;
426 case Iop_Add16x4: vex_printf("Add16x4"); return;
427 case Iop_Add32x2: vex_printf("Add32x2"); return;
428 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
429 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
430 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
431 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
432 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
433 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
434 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
435 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
436 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
437 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
438 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
439 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
440 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
441 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
442 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
443 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
444 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
445 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
446 case Iop_Sub8x8: vex_printf("Sub8x8"); return;
447 case Iop_Sub16x4: vex_printf("Sub16x4"); return;
448 case Iop_Sub32x2: vex_printf("Sub32x2"); return;
449 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
450 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
451 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
452 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
453 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
454 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
455 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
456 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
457 case Iop_Mul8x8: vex_printf("Mul8x8"); return;
458 case Iop_Mul16x4: vex_printf("Mul16x4"); return;
459 case Iop_Mul32x2: vex_printf("Mul32x2"); return;
460 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
461 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
462 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
463 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
464 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
465 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
466 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
467 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
468 case Iop_QDMulLong16Sx4: vex_printf("QDMulLong16Sx4"); return;
469 case Iop_QDMulLong32Sx2: vex_printf("QDMulLong32Sx2"); return;
470 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
471 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
472 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
473 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
474 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
475 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
476 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
477 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
478 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
479 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
480 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
481 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
482 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
483 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
484 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
485 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
486 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
487 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
488 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
489 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
490 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
491 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
492 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
493 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
494 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
495 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
496 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
497 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
498 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
499 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
500 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
501 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
502 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
503 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
504 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
505 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
506 case Iop_Clz8Sx8: vex_printf("Clz8Sx8"); return;
507 case Iop_Clz16Sx4: vex_printf("Clz16Sx4"); return;
508 case Iop_Clz32Sx2: vex_printf("Clz32Sx2"); return;
509 case Iop_Cls8Sx8: vex_printf("Cls8Sx8"); return;
510 case Iop_Cls16Sx4: vex_printf("Cls16Sx4"); return;
511 case Iop_Cls32Sx2: vex_printf("Cls32Sx2"); return;
512 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
513 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
514 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
515 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
516 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
517 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
518 case Iop_SarN8x8: vex_printf("SarN8x8"); return;
519 case Iop_SarN16x4: vex_printf("SarN16x4"); return;
520 case Iop_SarN32x2: vex_printf("SarN32x2"); return;
521 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
522 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
523 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
524 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
525 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
526 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
527 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
528 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
529 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
530 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
531 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
532 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
533 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
534 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
535 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
536 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
537 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
538 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
539 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
540 case Iop_Shl8x8: vex_printf("Shl8x8"); return;
541 case Iop_Shl16x4: vex_printf("Shl16x4"); return;
542 case Iop_Shl32x2: vex_printf("Shl32x2"); return;
543 case Iop_Shr8x8: vex_printf("Shr8x8"); return;
544 case Iop_Shr16x4: vex_printf("Shr16x4"); return;
545 case Iop_Shr32x2: vex_printf("Shr32x2"); return;
546 case Iop_QShl8x8: vex_printf("QShl8x8"); return;
547 case Iop_QShl16x4: vex_printf("QShl16x4"); return;
548 case Iop_QShl32x2: vex_printf("QShl32x2"); return;
549 case Iop_QShl64x1: vex_printf("QShl64x1"); return;
550 case Iop_QSal8x8: vex_printf("QSal8x8"); return;
551 case Iop_QSal16x4: vex_printf("QSal16x4"); return;
552 case Iop_QSal32x2: vex_printf("QSal32x2"); return;
553 case Iop_QSal64x1: vex_printf("QSal64x1"); return;
554 case Iop_QShlN8x8: vex_printf("QShlN8x8"); return;
555 case Iop_QShlN16x4: vex_printf("QShlN16x4"); return;
556 case Iop_QShlN32x2: vex_printf("QShlN32x2"); return;
557 case Iop_QShlN64x1: vex_printf("QShlN64x1"); return;
558 case Iop_QShlN8Sx8: vex_printf("QShlN8Sx8"); return;
559 case Iop_QShlN16Sx4: vex_printf("QShlN16Sx4"); return;
560 case Iop_QShlN32Sx2: vex_printf("QShlN32Sx2"); return;
561 case Iop_QShlN64Sx1: vex_printf("QShlN64Sx1"); return;
562 case Iop_QSalN8x8: vex_printf("QSalN8x8"); return;
563 case Iop_QSalN16x4: vex_printf("QSalN16x4"); return;
564 case Iop_QSalN32x2: vex_printf("QSalN32x2"); return;
565 case Iop_QSalN64x1: vex_printf("QSalN64x1"); return;
566 case Iop_Sar8x8: vex_printf("Sar8x8"); return;
567 case Iop_Sar16x4: vex_printf("Sar16x4"); return;
568 case Iop_Sar32x2: vex_printf("Sar32x2"); return;
569 case Iop_Sal8x8: vex_printf("Sal8x8"); return;
570 case Iop_Sal16x4: vex_printf("Sal16x4"); return;
571 case Iop_Sal32x2: vex_printf("Sal32x2"); return;
572 case Iop_Sal64x1: vex_printf("Sal64x1"); return;
573 case Iop_Perm8x8: vex_printf("Perm8x8"); return;
574 case Iop_Reverse16_8x8: vex_printf("Reverse16_8x8"); return;
575 case Iop_Reverse32_8x8: vex_printf("Reverse32_8x8"); return;
576 case Iop_Reverse32_16x4: vex_printf("Reverse32_16x4"); return;
577 case Iop_Reverse64_8x8: vex_printf("Reverse64_8x8"); return;
578 case Iop_Reverse64_16x4: vex_printf("Reverse64_16x4"); return;
579 case Iop_Reverse64_32x2: vex_printf("Reverse64_32x2"); return;
580 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
582 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
583 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
584 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return;
586 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return;
587 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return;
588 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
589 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return;
590 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
592 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return;
593 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
594 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return;
595 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
597 case Iop_Max32Fx8: vex_printf("Max32Fx8"); return;
598 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return;
599 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return;
600 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return;
601 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return;
602 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
603 case Iop_Max64Fx4: vex_printf("Max64Fx4"); return;
604 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return;
605 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
607 case Iop_Min32Fx8: vex_printf("Min32Fx8"); return;
608 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return;
609 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return;
610 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return;
611 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return;
612 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
613 case Iop_Min64Fx4: vex_printf("Min64Fx4"); return;
614 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return;
615 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
617 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return;
618 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
619 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return;
620 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
622 case Iop_Recip32x2: vex_printf("Recip32x2"); return;
623 case Iop_Recip32Fx2: vex_printf("Recip32Fx2"); return;
624 case Iop_Recip32Fx4: vex_printf("Recip32Fx4"); return;
625 case Iop_Recip32Fx8: vex_printf("Recip32Fx8"); return;
626 case Iop_Recip32x4: vex_printf("Recip32x4"); return;
627 case Iop_Recip32F0x4: vex_printf("Recip32F0x4"); return;
628 case Iop_Recip64Fx2: vex_printf("Recip64Fx2"); return;
629 case Iop_Recip64F0x2: vex_printf("Recip64F0x2"); return;
630 case Iop_Recps32Fx2: vex_printf("VRecps32Fx2"); return;
631 case Iop_Recps32Fx4: vex_printf("VRecps32Fx4"); return;
632 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return;
633 case Iop_Rsqrts32Fx4: vex_printf("VRsqrts32Fx4"); return;
634 case Iop_Rsqrts32Fx2: vex_printf("VRsqrts32Fx2"); return;
636 case Iop_RSqrt32Fx4: vex_printf("RSqrt32Fx4"); return;
637 case Iop_RSqrt32F0x4: vex_printf("RSqrt32F0x4"); return;
638 case Iop_RSqrt32Fx8: vex_printf("RSqrt32Fx8"); return;
639 case Iop_RSqrt64Fx2: vex_printf("RSqrt64Fx2"); return;
640 case Iop_RSqrt64F0x2: vex_printf("RSqrt64F0x2"); return;
642 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return;
643 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
644 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return;
645 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
646 case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return;
647 case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return;
649 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return;
650 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return;
651 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
652 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return;
653 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
655 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
656 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
657 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
658 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
659 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
660 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
661 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
662 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
663 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
664 vex_printf("CmpUN64Fx2"); return;
665 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
666 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
667 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
669 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
670 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
671 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
672 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
673 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
674 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
675 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
676 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
678 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
679 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
681 case Iop_V128to64: vex_printf("V128to64"); return;
682 case Iop_V128HIto64: vex_printf("V128HIto64"); return;
683 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
685 case Iop_64UtoV128: vex_printf("64UtoV128"); return;
686 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
688 case Iop_32UtoV128: vex_printf("32UtoV128"); return;
689 case Iop_V128to32: vex_printf("V128to32"); return;
690 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
692 case Iop_Dup8x16: vex_printf("Dup8x16"); return;
693 case Iop_Dup16x8: vex_printf("Dup16x8"); return;
694 case Iop_Dup32x4: vex_printf("Dup32x4"); return;
695 case Iop_Dup8x8: vex_printf("Dup8x8"); return;
696 case Iop_Dup16x4: vex_printf("Dup16x4"); return;
697 case Iop_Dup32x2: vex_printf("Dup32x2"); return;
699 case Iop_NotV128: vex_printf("NotV128"); return;
700 case Iop_AndV128: vex_printf("AndV128"); return;
701 case Iop_OrV128: vex_printf("OrV128"); return;
702 case Iop_XorV128: vex_printf("XorV128"); return;
704 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
705 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
706 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
707 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
709 case Iop_Abs8x16: vex_printf("Abs8x16"); return;
710 case Iop_Abs16x8: vex_printf("Abs16x8"); return;
711 case Iop_Abs32x4: vex_printf("Abs32x4"); return;
713 case Iop_Add8x16: vex_printf("Add8x16"); return;
714 case Iop_Add16x8: vex_printf("Add16x8"); return;
715 case Iop_Add32x4: vex_printf("Add32x4"); return;
716 case Iop_Add64x2: vex_printf("Add64x2"); return;
717 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
718 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
719 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
720 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
721 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
722 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
723 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
724 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
725 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
726 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
727 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
728 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
729 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
730 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
731 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
732 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
733 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
735 case Iop_Sub8x16: vex_printf("Sub8x16"); return;
736 case Iop_Sub16x8: vex_printf("Sub16x8"); return;
737 case Iop_Sub32x4: vex_printf("Sub32x4"); return;
738 case Iop_Sub64x2: vex_printf("Sub64x2"); return;
739 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
740 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
741 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
742 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
743 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
744 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
745 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
746 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
748 case Iop_Mul8x16: vex_printf("Mul8x16"); return;
749 case Iop_Mul16x8: vex_printf("Mul16x8"); return;
750 case Iop_Mul32x4: vex_printf("Mul32x4"); return;
751 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return;
752 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return;
753 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return;
754 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return;
755 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return;
756 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return;
757 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
758 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
759 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
760 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
761 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
762 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
763 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
764 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
765 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
766 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
768 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
769 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
770 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
771 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
773 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
774 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
775 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
776 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
777 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
778 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
780 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
781 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
782 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
783 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
784 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
785 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
787 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
788 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
789 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
790 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
791 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
792 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
794 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return;
795 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return;
796 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return;
797 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return;
798 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
799 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
800 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
801 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
802 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
803 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
804 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
806 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
807 case Iop_Clz8Sx16: vex_printf("Clz8Sx16"); return;
808 case Iop_Clz16Sx8: vex_printf("Clz16Sx8"); return;
809 case Iop_Clz32Sx4: vex_printf("Clz32Sx4"); return;
810 case Iop_Cls8Sx16: vex_printf("Cls8Sx16"); return;
811 case Iop_Cls16Sx8: vex_printf("Cls16Sx8"); return;
812 case Iop_Cls32Sx4: vex_printf("Cls32Sx4"); return;
814 case Iop_ShlV128: vex_printf("ShlV128"); return;
815 case Iop_ShrV128: vex_printf("ShrV128"); return;
817 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
818 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
819 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
820 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
821 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
822 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
823 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
824 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
825 case Iop_SarN8x16: vex_printf("SarN8x16"); return;
826 case Iop_SarN16x8: vex_printf("SarN16x8"); return;
827 case Iop_SarN32x4: vex_printf("SarN32x4"); return;
828 case Iop_SarN64x2: vex_printf("SarN64x2"); return;
830 case Iop_Shl8x16: vex_printf("Shl8x16"); return;
831 case Iop_Shl16x8: vex_printf("Shl16x8"); return;
832 case Iop_Shl32x4: vex_printf("Shl32x4"); return;
833 case Iop_Shl64x2: vex_printf("Shl64x2"); return;
834 case Iop_QSal8x16: vex_printf("QSal8x16"); return;
835 case Iop_QSal16x8: vex_printf("QSal16x8"); return;
836 case Iop_QSal32x4: vex_printf("QSal32x4"); return;
837 case Iop_QSal64x2: vex_printf("QSal64x2"); return;
838 case Iop_QShl8x16: vex_printf("QShl8x16"); return;
839 case Iop_QShl16x8: vex_printf("QShl16x8"); return;
840 case Iop_QShl32x4: vex_printf("QShl32x4"); return;
841 case Iop_QShl64x2: vex_printf("QShl64x2"); return;
842 case Iop_QSalN8x16: vex_printf("QSalN8x16"); return;
843 case Iop_QSalN16x8: vex_printf("QSalN16x8"); return;
844 case Iop_QSalN32x4: vex_printf("QSalN32x4"); return;
845 case Iop_QSalN64x2: vex_printf("QSalN64x2"); return;
846 case Iop_QShlN8x16: vex_printf("QShlN8x16"); return;
847 case Iop_QShlN16x8: vex_printf("QShlN16x8"); return;
848 case Iop_QShlN32x4: vex_printf("QShlN32x4"); return;
849 case Iop_QShlN64x2: vex_printf("QShlN64x2"); return;
850 case Iop_QShlN8Sx16: vex_printf("QShlN8Sx16"); return;
851 case Iop_QShlN16Sx8: vex_printf("QShlN16Sx8"); return;
852 case Iop_QShlN32Sx4: vex_printf("QShlN32Sx4"); return;
853 case Iop_QShlN64Sx2: vex_printf("QShlN64Sx2"); return;
854 case Iop_Shr8x16: vex_printf("Shr8x16"); return;
855 case Iop_Shr16x8: vex_printf("Shr16x8"); return;
856 case Iop_Shr32x4: vex_printf("Shr32x4"); return;
857 case Iop_Shr64x2: vex_printf("Shr64x2"); return;
858 case Iop_Sar8x16: vex_printf("Sar8x16"); return;
859 case Iop_Sar16x8: vex_printf("Sar16x8"); return;
860 case Iop_Sar32x4: vex_printf("Sar32x4"); return;
861 case Iop_Sar64x2: vex_printf("Sar64x2"); return;
862 case Iop_Sal8x16: vex_printf("Sal8x16"); return;
863 case Iop_Sal16x8: vex_printf("Sal16x8"); return;
864 case Iop_Sal32x4: vex_printf("Sal32x4"); return;
865 case Iop_Sal64x2: vex_printf("Sal64x2"); return;
866 case Iop_Rol8x16: vex_printf("Rol8x16"); return;
867 case Iop_Rol16x8: vex_printf("Rol16x8"); return;
868 case Iop_Rol32x4: vex_printf("Rol32x4"); return;
870 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return;
871 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return;
872 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
873 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
874 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
875 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
876 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
877 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
878 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return;
879 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return;
880 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return;
881 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return;
882 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
883 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
884 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return;
885 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
886 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
887 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return;
888 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
889 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
890 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return;
891 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
892 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
893 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return;
894 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
895 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
897 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
898 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
899 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
900 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
901 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
902 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
903 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
904 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
906 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
907 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
908 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
909 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
910 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
911 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
913 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
914 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
915 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
916 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
917 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
918 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
920 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
921 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
922 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
923 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
925 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
926 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
927 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
928 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
929 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
930 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
932 case Iop_Extract64: vex_printf("Extract64"); return;
933 case Iop_ExtractV128: vex_printf("ExtractV128"); return;
935 case Iop_Perm8x16: vex_printf("Perm8x16"); return;
936 case Iop_Perm32x4: vex_printf("Perm32x4"); return;
937 case Iop_Reverse16_8x16: vex_printf("Reverse16_8x16"); return;
938 case Iop_Reverse32_8x16: vex_printf("Reverse32_8x16"); return;
939 case Iop_Reverse32_16x8: vex_printf("Reverse32_16x8"); return;
940 case Iop_Reverse64_8x16: vex_printf("Reverse64_8x16"); return;
941 case Iop_Reverse64_16x8: vex_printf("Reverse64_16x8"); return;
942 case Iop_Reverse64_32x4: vex_printf("Reverse64_32x4"); return;
944 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
945 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
946 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
947 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
948 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
949 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
950 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
951 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
953 case Iop_D32toD64: vex_printf("D32toD64"); return;
954 vex_printf("D64toD32"); return;
955 case Iop_AddD64: vex_printf("AddD64"); return;
956 case Iop_SubD64: vex_printf("SubD64"); return;
957 case Iop_MulD64: vex_printf("MulD64"); return;
958 case Iop_DivD64: vex_printf("DivD64"); return;
959 case Iop_ShlD64: vex_printf("ShlD64"); return;
960 case Iop_ShrD64: vex_printf("ShrD64"); return;
961 case Iop_D64toI64S: vex_printf("D64toI64S"); return;
962 case Iop_I64StoD64: vex_printf("I64StoD64"); return;
963 case Iop_I64StoD128: vex_printf("I64StoD128"); return;
964 case Iop_D64toD128: vex_printf("D64toD128"); return;
965 case Iop_D128toD64: vex_printf("D128toD64"); return;
966 case Iop_D128toI64S: vex_printf("D128toI64S"); return;
967 case Iop_AddD128: vex_printf("AddD128"); return;
968 case Iop_SubD128: vex_printf("SubD128"); return;
969 case Iop_MulD128: vex_printf("MulD128"); return;
970 case Iop_DivD128: vex_printf("DivD128"); return;
971 case Iop_ShlD128: vex_printf("ShlD128"); return;
972 case Iop_ShrD128: vex_printf("ShrD128"); return;
973 case Iop_RoundD64toInt: vex_printf("Iop_RoundD64toInt"); return;
974 case Iop_RoundD128toInt: vex_printf("Iop_RoundD128toInt"); return;
975 case Iop_QuantizeD64: vex_printf("Iop_QuantizeD64"); return;
976 case Iop_QuantizeD128: vex_printf("Iop_QuantizeD128"); return;
977 case Iop_ExtractExpD64: vex_printf("Iop_ExtractExpD64"); return;
978 case Iop_ExtractExpD128: vex_printf("Iop_ExtractExpD128"); return;
979 case Iop_InsertExpD64: vex_printf("Iop_InsertExpD64"); return;
980 case Iop_InsertExpD128: vex_printf("Iop_InsertExpD128"); return;
981 case Iop_CmpD64: vex_printf("CmpD64"); return;
982 case Iop_CmpD128: vex_printf("CmpD128"); return;
983 case Iop_D64HLtoD128: vex_printf("D64HLtoD128"); return;
984 case Iop_D128HItoD64: vex_printf("D128HItoD64"); return;
985 case Iop_D128LOtoD64: vex_printf("D128LOtoD64"); return;
986 case Iop_SignificanceRoundD64: vex_printf("Iop_SignificanceRoundD64");
988 case Iop_SignificanceRoundD128: vex_printf("Iop_SignificanceRoundD128");
990 case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return;
991 case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return;
992 case Iop_V256to64_0: vex_printf("V256to64_0"); return;
993 case Iop_V256to64_1: vex_printf("V256to64_1"); return;
994 case Iop_V256to64_2: vex_printf("V256to64_2"); return;
995 case Iop_V256to64_3: vex_printf("V256to64_3"); return;
996 case Iop_64x4toV256: vex_printf("64x4toV256"); return;
997 case Iop_V256toV128_0: vex_printf("V256toV128_0"); return;
998 case Iop_V256toV128_1: vex_printf("V256toV128_1"); return;
999 case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return;
1000 case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return;
1001 case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return;
1002 case Iop_Add64Fx4: vex_printf("Add64Fx4"); return;
1003 case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return;
1004 case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return;
1005 case Iop_Div64Fx4: vex_printf("Div64Fx4"); return;
1006 case Iop_Add32Fx8: vex_printf("Add32Fx8"); return;
1007 case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return;
1008 case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return;
1009 case Iop_Div32Fx8: vex_printf("Div32Fx8"); return;
1010 case Iop_AndV256: vex_printf("AndV256"); return;
1011 case Iop_OrV256: vex_printf("OrV256"); return;
1012 case Iop_XorV256: vex_printf("XorV256"); return;
1013 case Iop_NotV256: vex_printf("NotV256"); return;
1014 case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return;
1015 case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return;
1021 case 0: vex_printf("%s",str); vex_printf("8"); break;
1022 case 1: vex_printf("%s",str); vex_printf("16"); break;
1023 case 2: vex_printf("%s",str); vex_printf("32"); break;
1024 case 3: vex_printf("%s",str); vex_printf("64"); break;
1034 vex_printf("BIND-%d", e->Iex.Binder.binder);
1037 vex_printf( "GET:" );
1039 vex_printf("(%d)", e->Iex.Get.offset);
1042 vex_printf( "GETI" );
1044 vex_printf("[");
1046 vex_printf(",%d]", e->Iex.GetI.bias);
1054 vex_printf( "(" );
1056 vex_printf( "," );
1058 vex_printf( "," );
1060 vex_printf( "," );
1062 vex_printf( ")" );
1068 vex_printf( "(" );
1070 vex_printf( "," );
1072 vex_printf( "," );
1074 vex_printf( ")" );
1079 vex_printf( "(" );
1081 vex_printf( "," );
1083 vex_printf( ")" );
1087 vex_printf( "(" );
1089 vex_printf( ")" );
1092 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1094 vex_printf( "(" );
1096 vex_printf( ")" );
1103 vex_printf("(");
1107 vex_printf(",");
1109 vex_printf("):");
1113 vex_printf("Mux0X(");
1115 vex_printf(",");
1117 vex_printf(",");
1119 vex_printf(")");
1129 case Ifx_None: vex_printf("noFX"); return;
1130 case Ifx_Read: vex_printf("RdFX"); return;
1131 case Ifx_Write: vex_printf("WrFX"); return;
1132 case Ifx_Modify: vex_printf("MoFX"); return;
1142 vex_printf(" = ");
1144 vex_printf("DIRTY ");
1147 vex_printf(" NeedsBBP");
1149 vex_printf(" ");
1151 vex_printf("-mem(");
1153 vex_printf(",%d)", d->mSize);
1156 vex_printf(" ");
1158 vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset,
1161 vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats,
1164 vex_printf(")");
1166 vex_printf(" ::: ");
1168 vex_printf("(");
1172 vex_printf(",");
1175 vex_printf(")");
1184 vex_printf(",");
1187 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1189 vex_printf("::");
1192 vex_printf(",");
1195 vex_printf("->");
1198 vex_printf(",");
1201 vex_printf(")");
1206 vex_printf( "PUTI" );
1208 vex_printf("[");
1210 vex_printf(",%d] = ", puti->bias);
1217 case Ijk_Boring: vex_printf("Boring"); break;
1218 case Ijk_Call: vex_printf("Call"); break;
1219 case Ijk_Ret: vex_printf("Return"); break;
1220 case Ijk_ClientReq: vex_printf("ClientReq"); break;
1221 case Ijk_Yield: vex_printf("Yield"); break;
1222 case Ijk_EmWarn: vex_printf("EmWarn"); break;
1223 case Ijk_EmFail: vex_printf("EmFail"); break;
1224 case Ijk_NoDecode: vex_printf("NoDecode"); break;
1225 case Ijk_MapFail: vex_printf("MapFail"); break;
1226 case Ijk_TInval: vex_printf("Invalidate"); break;
1227 case Ijk_NoRedir: vex_printf("NoRedir"); break;
1228 case Ijk_SigTRAP: vex_printf("SigTRAP"); break;
1229 case Ijk_SigSEGV: vex_printf("SigSEGV"); break;
1230 case Ijk_SigBUS: vex_printf("SigBUS"); break;
1231 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break;
1232 case Ijk_Sys_int32: vex_printf("Sys_int32"); break;
1233 case Ijk_Sys_int128: vex_printf("Sys_int128"); break;
1234 case Ijk_Sys_int129: vex_printf("Sys_int129"); break;
1235 case Ijk_Sys_int130: vex_printf("Sys_int130"); break;
1236 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break;
1245 vex_printf("Fence"); break;
1247 vex_printf("CancelReservation"); break;
1256 vex_printf("!!! IRStmt* which is NULL !!!");
1261 vex_printf("IR-NoOp");
1264 vex_printf( "------ IMark(0x%llx, %d, %u) ------",
1269 vex_printf("====== AbiHint(");
1271 vex_printf(", %d, ", s->Ist.AbiHint.len);
1273 vex_printf(") ======");
1276 vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
1284 vex_printf( " = " );
1288 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
1290 vex_printf( ") = ");
1299 vex_printf(" = LD%s-Linked(",
1302 vex_printf(")");
1305 vex_printf(" = ( ST%s-Cond(",
1308 vex_printf(") = ");
1310 vex_printf(" )");
1317 vex_printf("IR-");
1321 vex_printf( "if (" );
1323 vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP);
1325 vex_printf("; exit-");
1327 vex_printf(" } ");
1338 vex_printf( " ");
1340 vex_printf( ":");
1343 vex_printf( "\n");
1345 vex_printf( " ");
1348 vex_printf( "\n");
1354 vex_printf("IRSB {\n");
1356 vex_printf("\n");
1358 vex_printf( " ");
1360 vex_printf( "\n");
1362 vex_printf( " PUT(%d) = ", bb->offsIP );
1364 vex_printf( "; exit-");
1366 vex_printf( "\n}\n");
3135 vex_printf("\nIR SANITY CHECK FAILURE\n\n");
3138 vex_printf("\nIN STATEMENT:\n\n");
3141 vex_printf("\n\nERROR = %s\n\n", what );
3336 vex_printf(" op name: " );
3338 vex_printf("\n");
3349 vex_printf(" op name: ");
3351 vex_printf("\n");
3352 vex_printf(" op type is (");
3354 vex_printf(",");
3356 vex_printf(",");
3358 vex_printf(",");
3360 vex_printf(") -> ");
3362 vex_printf("\narg tys are (");
3364 vex_printf(",");
3366 vex_printf(",");
3368 vex_printf(",");
3370 vex_printf(")\n");
3387 vex_printf(" op name: " );
3389 vex_printf("\n");
3398 vex_printf(" op name: ");
3400 vex_printf("\n");
3401 vex_printf(" op type is (");
3403 vex_printf(",");
3405 vex_printf(",");
3407 vex_printf(") -> ");
3409 vex_printf("\narg tys are (");
3411 vex_printf(",");
3413 vex_printf(",");
3415 vex_printf(")\n");
3430 vex_printf(" op name: " );
3432 vex_printf("\n");
3440 vex_printf(" op name: ");
3442 vex_printf("\n");
3443 vex_printf(" op type is (");
3445 vex_printf(",");
3447 vex_printf(") -> ");
3449 vex_printf("\narg tys are (");
3451 vex_printf(",");
3453 vex_printf(")\n");
3742 vex_printf("sanityCheck: %s\n", caller);
3756 vex_printf("Temp t%d declared with implausible type 0x%x\n",
3907 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
