Lines Matching defs:l1
55 /* min of L1 and LL cache line sizes. This only gets set to a
1700 void branchsim_printstat(int l1, int l2, int l3)
1715 l1, l2, l3);
1729 VG_(percentify)(B_total_mp, B_total_b, 1, l1+1, buf1);
1741 Int l1, l2, l3;
1837 l1 = ULong_width( total[fullOffset(EG_IR)] );
1851 VG_(sprintf)(fmt, "%%s %%,%dllu\n", l1);
1857 (*CLG_(cachesim).printstat)(l1, l2, l3);
1860 branchsim_printstat(l1, l2, l3);
