Lines Matching full:srcstep
21 ;// [in] srcStep Reference frame step in byte
38 ;// srcStep or dstStep >= roi.width.
44 ;// srcStep and dstStep is multiple of 8.
78 srcStep RN 1
148 STM pArgs, {pSrc,srcStep,pDst,dstStep}
211 SUB pSrc, pSrc, srcStep, LSL #1
229 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
230 SUB pSrc, pSrc, srcStep, LSL #1
236 MOV srcStep, #4
246 SUB pSrc, pSrc, srcStep, LSL #1
266 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
267 SUB pSrc, pSrc, srcStep, LSL #1
274 MOV srcStep, #4
282 SUB pSrc, pSrc, srcStep, LSL #1
292 SUB pSrc, pSrc, srcStep, LSL #1
295 ADD pSrc, pSrc, srcStep, LSL #1
307 SUB pSrc, pSrc, srcStep, LSL #1
310 ADD pSrc, pSrc, srcStep, LSL #1
318 SUB pSrc, pSrc, srcStep, LSL #1
321 ADD pSrc, pSrc, srcStep, LSL #1
332 SUB pSrc, pSrc, srcStep, LSL #1
336 ADD pSrc, pSrc, srcStep ;// Update pSrc to one row down
343 ADD pSrc, pSrc, srcStep
350 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
351 SUB pSrc, pSrc, srcStep, LSL #1
357 MOV srcStep, #4
365 SUB pSrc, pSrc, srcStep, LSL #1
380 ADD pSrc, pSrc, srcStep
387 LDM pArgs, {pSrc, srcStep, pDst, dstStep}
388 SUB pSrc, pSrc, srcStep, LSL #1
395 MOV srcStep, #4
403 LDM pArgs, {pSrc,srcStep,pDst,dstStep} ;// Load arguments
412 ADD pSrc, pSrc, srcStep, LSL #2
