Lines Matching defs:srcStep
25 srcStep RN 1
119 VLD1 qSrcA01, [pSrc], srcStep ;// [a0 a1 a2 a3 .. a15]
120 ADD r12, pSrc, srcStep, LSL #2
123 VLD1 qSrcF1011, [r12], srcStep
124 VLD1 qSrcB23, [pSrc], srcStep ;// [b0 b1 b2 b3 .. b15]
126 VLD1 qSrcG1213, [r12], srcStep
128 VLD1 qSrcC45, [pSrc], srcStep ;// [c0 c1 c2 c3 .. c15]
130 VLD1 qSrcD67, [pSrc], srcStep
132 VLD1 qSrcE89, [pSrc], srcStep
137 VLD1 qSrcH1415, [r12], srcStep
141 VLD1 qSrcI1617, [r12], srcStep ;// [i0 i1 i2 i3 .. ]
