Lines Matching full:precision
806 * that it provides 16 double-precision FPU registers (d0-d15) and 32
807 * single-precision ones (s0-s31) which happen to be mapped to the same
811 * additional double precision registers (d16-d31). Note that there are
812 * still only 32 single precision registers.
814 * VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision
831 * half-precision (16-bit) conversion operations.
833 * VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision
848 * #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns.
850 * #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision.
851 * #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision.
854 * #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions.
