Lines Matching full:architecture
89 [-march=ARCHITECTURE[+EXTENSION...]]
472 `-march=ARCHITECTURE[+EXTENSION...]'
473 Specify which ARM architecture variant is used by the target.
476 Select which Floating Point architecture is the target.
533 Specify which variant of the 960 architecture is the target.
694 SPARC architecture:
698 Explicitly select a variant of the SPARC architecture.
711 Warn when the assembler switches to another architecture.
714 'c54x architecture.
751 Generate code for a particular MIPS Instruction Set Architecture
873 exception (and only work for Instruction Set Architecture level 2
924 Select the architecture mode, either the Enterprise System
925 Architecture (esa) or the z/Architecture mode (zarch).
943 Enable (only) instructions from architecture ARCH. By default,
953 an architecture is specified with `-march' that implies these
955 architectures); they are disabled if an architecture is specified
958 architecture, independent of the order in which the `-march' or
1100 architecture; we do _not_ describe the instruction set, standard
1102 particular architecture. You may want to consult the manufacturer's
1103 machine architecture manual for this information.
1112 the GNU assembler on one architecture, you should find a fairly similar
1113 environment when you use it on another architecture. Each version has
1123 architecture; for example, we know of several incompatible versions of
2091 On the Intel 960 architecture, the letter must be one of the
2094 On the HPPA architecture, the letter must be `E' (upper case only).
3267 also emits some architecture dependent initial CFI instructions.
3798 architecture, it may also be a synonym for `.word'.
4269 as any other one permitted by the target architecture, there may be
4273 symbol name, but the architecture specific code special-cases it
5415 `as' assembles source files written for a specific architecture into
5416 object files for that architecture. But not all object files are alike.
5422 objects are built for different generations of the same architecture,
5438 Architecture. The file format is documented in `ELF for the ARM
5439 Architecture'.
5458 second bit (`TAG & 2' is set for architecture-independent attributes
5459 and clear for architecture-dependent ones.
5535 * The header for your architecture `include/elf', to define the tag.
5537 architecture, to merge the
6084 Alpha Architecture Handbook
6434 Divide Extensions for v7-A architecture), `iwmmxt', `iwmmxt2',
6436 architectures), `os' (Operating System for v6M architecture),
6438 (Virtualization Extensions for v7-A architecture, implies `idiv'),
6441 `-march=ARCHITECTURE[+EXTENSION...]'
6442 This option specifies the target architecture. The assembler will
6444 instruction which will not execute on the target architecture.
6445 The following architecture names are recognized: `armv1', `armv2',
6453 The architecture option can be extended with the same instruction
6473 Architecture 5 or later, the default is to assembler for VFP
6598 All of the instructions new to the V6T2 architecture (and later)
6701 Select the target architecture. Valid values for NAME are the
6704 Specifying `.arch' clears any previously selected architecture
6708 Add or remove an architecture extension to the target
6709 architecture. Valid values for NAME are the same as those
6714 extensions incrementally to the architecture being compiled for.
6739 Specifying `.cpu' clears any previously selected architecture
6861 Override the architecture recorded in the EABI object attribute
7080 The ABI for the ARM Architecture specifies a standard format for
7217 Architecture' available from `http://infocenter.arm.com'.
7798 an operand. The `@' is required. CR16 architecture uses one of the
7926 The option `--march=ARCHITECTURE' specifies the recognized
7928 architecture type of the object file. Valid values for ARCHITECTURE
7931 All instructions and register names for any architecture variant
8195 `--march=ARCHITECTURE' option (*note march-option::).
8244 architecture manual. The differences are detailed below.
8262 Architecture Manual. However, the names in the manual are sometimes
8479 Architecture: A VLIW Microprocessor for Multimedia Applications'
8526 architecture manual. The differences are detailed below.
8544 Architecture Manual. However, the names in the manual are sometimes
8803 Architecture: A VLIW Microprocessor for Multimedia Applications'
9445 `PA-RISC Architecture and Instruction Set Reference Manual' (HP
9655 architecture in both 16 and 32-bit mode as well as AMD x86-64
9656 architecture extending the Intel architecture to 64-bits.
9672 * i386-Arch:: Specifying an x86 CPU architecture
9686 implies Intel i386 architecture, while 64-bit implies AMD x86-64
9687 architecture.
9960 The AMD x86-64 architecture extends the register set by:
10096 The x86-64 architecture adds an RIP (instruction pointer relative)
10108 Other addressing modes remain unchanged in x86-64 architecture,
10281 9.13.15 Specifying CPU Architecture
10284 `as' may be told to assemble for a particular CPU (sub-)architecture
10312 used on the 486 (and when no architecture is specified) because it
10320 Following the CPU architecture (but not a sub-architecture, which
10540 Select the 80960 architecture. Instructions or features not
10541 supported by the selected architecture cause fatal errors.
10552 it is critical that the `as' output match a specific architecture,
10553 specify that architecture explicitly.
10675 instruction subset for a particular 960 architecture.
10923 IA-64 Architecture Handbook
11371 The Renease M32R version of `as' has a few architecture specific
11544 `-march=ARCHITECTURE'
11545 This option specifies a target architecture. The following
11553 architecture. Also, the generic features of the architecture are
11564 Enable or disable various architecture specific features. If a
11565 chip or architecture by default supports an option (for instance
11623 Always keep branches PC-relative. In the M680x0 architecture all
11904 Select the target architecture and extension features. Valid
11909 same architecture and extension set.
12410 of the GNU assembler that are specific to the MicroBlaze architecture.
12478 Architecture', by Kane and Heindrich (Prentice-Hall). For an overview
12534 Generate code for a particular MIPS Instruction Set Architecture
12748 Architecture level 2 and higher.
12871 Instruction Set Architecture level on the fly: `.set mipsN'. N should
14078 architecture.
14106 architecture reference manual.
14156 Generate code for A2 architecture.
14168 Generate code for Power4 architecture.
14171 Generate code for Power5 architecture.
14174 Generate code for Power6 architecture.
14177 Generate code for Power7 architecture.
14180 Generate code for Cell Broadband Engine architecture.
14186 Generate code for any architecture (PWR/PWRX/PPC).
14348 chip levels. The architecture modes are the Enterprise System
14349 Architecture (ESA) and the newer z/Architecture mode. The chip levels
14378 Select the architecture mode, either the Enterprise System
14379 Architecture (esa) mode or the z/Architecture mode (zarch).
14381 The 64-bit instructions are only available with the z/Architecture
14419 Systems Architecture/390 Principles of Operation (SA22-7201) and the
14420 z/Architecture Principles of Operation (SA22-7832).
15441 operations. Also, a superscalar architecture is employed that enables
15466 Architecture
15742 `SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
15782 architecture reference manual.
15785 "bumps" the architecture level as needed: it switches to successively
15794 architecture is explicitly requested. SPARC v9 is always incompatible
15800 architectures explicitly. If you select an architecture
15819 architecture level is explicitly requested, GAS will not issue
15855 The assembler syntax closely follows The Sparc Architecture Manual,
17060 Enable (only) instructions from architecture ARCH. By default,
17070 an architecture is specified with `-march' that implies these
17072 architectures); they are disabled if an architecture is specified
17075 architecture, independent of the order in which the `-march' or
18106 produced by GCC for all versions of the v850 architecture,
18107 together with support routines only used by the V850E architecture.
18474 32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
18484 to the Xtensa architecture. For details about the Xtensa instruction
18485 set, please consult the `Xtensa Instruction Set Architecture (ISA)
18610 See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
19442 architecture.
19456 Jon Beniston added support for the Lattice Mico32 architecture.
20049 * --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 33)
20542 * architecture options, i960: Options-i960. (line 6)
20543 * architecture options, IP2022: IP2K-Opts. (line 9)
20544 * architecture options, IP2K: IP2K-Opts. (line 14)
20545 * architecture options, M16C: M32C-Opts. (line 12)
20546 * architecture options, M32C: M32C-Opts. (line 9)
20547 * architecture options, M32R: M32R-Opts. (line 21)
20548 * architecture options, M32R2: M32R-Opts. (line 17)
20549 * architecture options, M32RX: M32R-Opts. (line 9)
20550 * architecture options, M680x0: M68K-Opts. (line 98)
20551 * Architecture variant option, CRIS: CRIS-Opts. (line 33)
20740 * CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 33)
20747 * CRIS architecture variant option: CRIS-Opts. (line 33)
21044 * i960 architecture options: Options-i960. (line 6)
21147 * IP2K architecture options: IP2K-Opts. (line 14)
21277 * M16C architecture option: M32C-Opts. (line 12)
21278 * M32C architecture option: M32C-Opts. (line 9)
21282 * M32R architecture options: M32R-Opts. (line 17)
21288 * M680x0 architecture options: M68K-Opts. (line 98)
21357 * MIPS architecture options: MIPS Opts. (line 29)
22060 * Xtensa architecture: Xtensa-Dependent. (line 6)
