| /external/llvm/include/llvm/CodeGen/ |
| CalcSpillWeights.h | 44 LiveIntervals &LIS;
48 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
50 MF(mf), LIS(lis), Loops(loops) {}
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| LiveRegMatrix.h | 43 LiveIntervals *LIS;
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| LiveRangeEdit.h | 61 LiveIntervals &LIS;
98 /// @param lis The collection of all live intervals in this function.
105 LiveIntervals &lis,
109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
189 /// to erase it from LIS.
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| RegisterPressure.h | 174 const LiveIntervals *LIS;
183 /// or RegisterPressure. If requireIntervals is false, LIS are ignored.
199 MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(true) {}
202 MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(false) {}
205 const LiveIntervals *lis, const MachineBasicBlock *mbb,
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| ScheduleDAGInstrs.h | 76 LiveIntervals *LIS;
145 LiveIntervals *LIS = 0);
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| MachineScheduler.h | 56 LiveIntervals *LIS;
256 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
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| /external/llvm/lib/CodeGen/ |
| RegAllocBase.h | 64 LiveIntervals *LIS;
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
73 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
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| CalcSpillWeights.cpp | 46 LiveIntervals &LIS = getAnalysis<LiveIntervals>();
48 VirtRegAuxInfo VRAI(MF, LIS, getAnalysis<MachineLoopInfo>());
53 VRAI.CalculateWeightAndHint(LIS.getInterval(Reg));
91 const LiveIntervals &LIS,
101 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
104 if (!TII.isTriviallyReMaterializable(MI, LIS.getAliasAnalysis()))
153 if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
189 if (li.isZeroLength(LIS.getSlotIndexes())) {
198 if (isRematerializable(li, LIS, *MF.getTarget().getInstrInfo()))
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| VirtRegMap.cpp | 160 LiveIntervals *LIS;
208 LIS = &getAnalysis<LiveIntervals>();
216 LIS->addKillFlags(VRM);
242 LiveInterval &LI = LIS->getInterval(VirtReg);
243 if (LI.empty() || LIS->intervalIsInOneMBB(LI))
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| InterferenceCache.h | 57 /// LIS - Used for accessing register mask interference maps.
58 LiveIntervals *LIS;
96 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(0), LIS(0) {}
98 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) {
103 LIS = lis;
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| SplitKit.h | 45 const LiveIntervals &LIS;
119 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
212 LiveIntervals &LIS;
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| PHIElimination.cpp | 52 LiveIntervals *LIS;
129 LIS = getAnalysisIfAvailable<LiveIntervals>();
138 if (!DisableEdgeSplitting && (LV || LIS)) {
157 if (LIS)
158 LIS->RemoveMachineInstrFromMaps(DefMI);
166 if (LIS)
167 LIS->RemoveMachineInstrFromMaps(I->first);
304 if (LIS) {
306 SlotIndex DestCopyIndex = LIS->InsertMachineInstrInMaps(NewInstr);
308 SlotIndex MBBStartIndex = LIS->getMBBStartIdx(&MBB)
[all...] |
| LiveDebugVariables.cpp | 129 LiveIntervals &LIS, const TargetInstrInfo &TII);
223 /// @param LIS Live intervals analysis.
228 LiveIntervals &LIS, MachineDominatorTree &MDT,
242 LiveIntervals &LIS);
247 LiveIntervals &LIS, MachineDominatorTree &MDT,
260 LiveIntervals &LIS, const TargetInstrInfo &TRI);
280 LiveIntervals *LIS;
474 LIS->getMBBStartIdx(MBB) :
475 LIS->getInstructionIndex(llvm::prior(MBBI)).getRegSlot();
492 LiveIntervals &LIS, MachineDominatorTree &MDT
[all...] |
| LiveIntervalAnalysis.cpp | 710 LiveIntervals& LIS;
719 HMEditor(LiveIntervals& LIS, const MachineRegisterInfo& MRI,
722 : LIS(LIS), MRI(MRI), TRI(TRI), OldIdx(OldIdx), NewIdx(NewIdx),
731 return &LIS.getRegUnit(Unit);
732 return LIS.getCachedRegUnit(Unit);
754 updateRange(LIS.getInterval(Reg));
827 if (MachineInstr *KillMI = LIS.getInstructionFromIndex(I->end))
[all...] |
| MachineBasicBlock.cpp | 668 LiveIntervals *LIS = P->getAnalysisIfAvailable<LiveIntervals>();
670 if (LIS)
671 LIS->insertMBBInMaps(NMBB);
702 if (LIS) {
796 if (LIS) {
824 LiveInterval &LI = LIS->getInterval(Reg);
835 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
838 LiveInterval &LI = LIS->getInterval(Reg);
842 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
854 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs)
[all...] |
| RegAllocPBQP.cpp | 136 LiveIntervals *lis; member in class:__anon11464::RegAllocPBQP
190 const LiveIntervals *lis,
194 LiveIntervals *LIS = const_cast<LiveIntervals*>(lis);
215 LiveInterval *vregLI = &LIS->getInterval(vreg);
219 LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps);
237 if (vregLI->overlaps(LIS->getRegUnit(*Units))) {
265 const LiveInterval &l1 = lis->getInterval(vr1);
271 const LiveInterval &l2 = lis->getInterval(vr2);
316 const LiveIntervals *lis,
[all...] |
| InlineSpiller.cpp | 56 LiveIntervals &LIS;
140 LIS(pass.getAnalysis<LiveIntervals>()),
232 if (SnipLI.getNumValNums() > 2 || !LIS.intervalIsInOneMBB(SnipLI))
282 LiveInterval &SnipLI = LIS.getInterval(SnipReg);
368 SV.SpillMBB = LIS.getMBBFromIndex(SV.SpillVNI->def);
386 DepSV.SpillMBB = LIS.getMBBFromIndex(DepSV.SpillVNI->def);
526 LiveInterval &LI = LIS.getInterval(Reg);
527 LiveInterval &OrigLI = LIS.getInterval(Original);
572 MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
578 LiveInterval &SrcLI = LIS.getInterval(SrcReg)
[all...] |
| TwoAddressInstructionPass.cpp | 69 LiveIntervals *LIS;
165 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
208 if (LIS) {
209 LiveInterval &LI = LIS->getInterval(SavedReg);
213 SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();
219 KillMI = LIS->getInstructionFromIndex(I->end);
269 if (MO.isKill() || (LIS && isPlainlyKilled(OtherMI, MOReg, LIS))) {
282 if (!LIS) {
296 if (LIS)
[all...] |
| RegisterCoalescer.cpp | 84 LiveIntervals *LIS;
401 LiveRangeEdit(0, NewRegs, *MF, *LIS, 0, this).eliminateDeadDefs(DeadDefs);
431 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg());
433 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg());
434 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot();
456 MachineInstr *ACopyMI = LIS->getInstructionFromIndex(AValNo->def);
470 LIS->getInstructionFromIndex(ValLR->end.getPrevSlot());
509 LIS->shrinkToUses(&IntA);
523 if (LIS->hasPHIKill(IntA, AValNo))
572 SlotIndex CopyIdx = LIS->getInstructionIndex(CopyMI).getRegSlot()
[all...] |
