| /external/clang/test/CXX/basic/basic.lookup/basic.lookup.unqual/ |
| p3.cpp | 6 namespace N0 {
|
| /external/clang/test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/ |
| p4.cpp | 11 namespace N0 {
|
| /external/clang/test/CXX/temp/temp.arg/temp.arg.type/ |
| p2.cpp | 22 namespace N0 {
|
| /external/llvm/unittests/IR/ |
| MDBuilderTest.cpp | 84 MDNode *N0 = MDHelper.createTBAANode("Node", R);
88 EXPECT_EQ(N0, N3);
89 EXPECT_NE(N0, N1);
90 EXPECT_NE(N0, N2);
91 EXPECT_GE(N0->getNumOperands(), 2U);
94 EXPECT_TRUE(isa<MDString>(N0->getOperand(0)));
97 EXPECT_EQ(cast<MDString>(N0->getOperand(0))->getString(), "Node");
100 EXPECT_EQ(N0->getOperand(1), R);
|
| /external/clang/test/CXX/temp/temp.spec/temp.expl.spec/ |
| p2.cpp | 18 namespace N0 {
33 template<> void N0::f0(int) { } // okay
36 template<> void N0::f0(long) { } // expected-error{{does not enclose namespace}}
39 template<> void N0::f0(double); // expected-warning{{C++11 extension}}
40 template<> void N0::f0(double) { }
49 namespace N0 {
73 void N0::X0<T>::ft1(T t, U u) {
77 template<typename T> T N0::X0<T>::member;
79 template<> struct N0::X0<void> { }; // expected-warning{{C++11 extension}}
80 N0::X0<void> test_X0
[all...] |
| p2-0x.cpp | 18 namespace N0 {
33 template<> void N0::f0(int) { } // okay
36 template<> void N0::f0(long) { } // expected-error{{does not enclose namespace}}
39 template<> void N0::f0(double) { }
48 namespace N0 {
72 void N0::X0<T>::ft1(T t, U u) {
76 template<typename T> T N0::X0<T>::member;
78 template<> struct N0::X0<void> { };
79 N0::X0<void> test_X0;
82 template<> struct N0::X0<const void> { }; // expected-error{{class template specialization of 'X0' must originally be d (…)
[all...] |
| /external/clang/test/SemaCXX/ |
| linkage-spec.cpp | 30 namespace N0 {
|
| /external/clang/test/CodeGenCXX/ |
| bitfield.cpp | 9 namespace N0 {
|
| /external/clang/test/SemaTemplate/ |
| instantiate-member-template.cpp | 120 namespace N0 {
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 477 Value *N0 = dyn_castFNegVal(Opnd0, IgnoreZeroSign);
482 return BinaryOperator::CreateFMul(N0, N1);
486 Value *T = Builder->CreateFMul(N0, Opnd1);
[all...] |
| /libcore/luni/src/test/java/libcore/java/lang/ |
| ClassCastExceptionTest.java | 157 A0, B0, C0, D0, E0, F0, G0, H0, I0, J0, K0, L0, M0, N0, O0, P0, Q0, R0, S0, T0, U0, V0, W0, X0, Y0, Z0,
162 A0, B0, C0, D0, E0, F0, G0, H0, I0, J0, K0, L0, M0, N0, O0, P0, Q0, R0, S0, T0, U0, V0, W0, X0, Y0, Z0,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 856 SDValue N0 = N->getOperand(0);
857 if (N0.getOpcode() == ISD::SETCC) {
858 SDValue N00 = N0.getOperand(0);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 356 SDValue N0 = N->getOperand(0);
360 if (isOpcWithIntImmediate(N0.getNode(), ISD::AND, And_imm))
361 std::swap(N0, N1);
396 if (SelectT2ShifterOperandReg(N0, CPTmp0, CPTmp1))
399 if (SelectImmShifterOperand(N0, CPTmp0, CPTmp1) ||
400 SelectRegShifterOperand(N0, CPTmp0, CPTmp1, CPTmp2))
412 CurDAG->UpdateNodeOperands(N, N0, N1);
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 634 SDValue N0 = N.getOperand(0);
647 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
655 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
664 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
667 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) {
670 } else if (BlockAddressSDNode *BA = dyn_cast<BlockAddressSDNode>(N0)) {
693 if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(N0)) {
697 } else if (ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(N0)) {
702 } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(N0)) {
705 } else if (JumpTableSDNode *J = dyn_cast<JumpTableSDNode>(N0)) {
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 607 SDValue N0 = Op.getOperand(0);
611 if (N0.getOpcode() == ISD::ADD) {
612 AddOp = N0;
616 OtherOp = N0;
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 255 SDValue SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2);
256 SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2,
259 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
267 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1,
269 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1);
570 SDValue N0, N1, N2;
571 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse())
577 SDValue N0, SDValue N1) {
578 EVT VT = N0.getValueType();
579 if (N0.getOpcode() == Opc && isa<ConstantSDNode>(N0.getOperand(1)))
[all...] |
