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    Searched defs:Rd (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp 457 unsigned Rd = fieldFromInstruction(Insn, 0, 5);
475 DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
476 // BFM MCInsts use Rd as a source too.
477 if (Opc == BFM) DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
480 DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
481 // BFM MCInsts use Rd as a source too.
482 if (Opc == BFM) DecodeGPR32RegisterClass(Inst, Rd, Address, Decoder);
551 unsigned Rd = fieldFromInstruction(Insn, 0, 5);
556 DecodeVPR128RegisterClass(Inst, Rd, Address, Decoder);
559 DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder)
    [all...]
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp     [all...]
  /external/qemu/
trace.c 925 int Rd = (insn >> 8) & 15;
928 _interlock_def(Rd, result+1);
933 int Rd = (insn >> 12) & 15;
938 _interlock_def(Rd, result+2);
942 int Rd = (insn >> 12) & 15;
947 _interlock_def(Rd, result+2);
956 int Rd = (insn >> 12) & 15;
961 _interlock_def(Rd, result+2);
969 int Rd = (insn >> 12) & 15;
974 _interlock_def(Rd, result+2)
    [all...]
i386-dis.c 348 #define Rd { OP_R, d_mode }
    [all...]

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