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    Searched defs:RetVT (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 596 EVT RetVT = N->getValueType(0);
603 switch (RetVT.getSimpleVT().SimpleTy) {
614 switch (RetVT.getSimpleVT().SimpleTy) {
623 switch (RetVT.getSimpleVT().SimpleTy) {
634 switch (RetVT.getSimpleVT().SimpleTy) {
647 switch (RetVT.getSimpleVT().SimpleTy) {
658 switch (RetVT.getSimpleVT().SimpleTy) {
667 switch (RetVT.getSimpleVT().SimpleTy) {
678 switch (RetVT.getSimpleVT().SimpleTy) {
    [all...]
  /external/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp 69 /// result of type RetVT.
71 RTLIB::Libcall LC, EVT RetVT,
87 Type *RetTy = RetVT.getTypeForEVT(*DAG.getContext());
184 EVT RetVT = getCmpLibcallReturnType();
186 NewLHS = makeLibCall(DAG, LC1, RetVT, Ops, 2, false/*sign irrelevant*/, dl);
187 NewRHS = DAG.getConstant(0, RetVT);
190 SDValue Tmp = DAG.getNode(ISD::SETCC, dl, getSetCCResultType(RetVT),
192 NewLHS = makeLibCall(DAG, LC2, RetVT, Ops, 2, false/*sign irrelevant*/, dl);
193 NewLHS = DAG.getNode(ISD::SETCC, dl, getSetCCResultType(RetVT), NewLHS,
    [all...]
LegalizeVectorTypes.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMFastISel.cpp 138 unsigned FastEmitInst_extractsubreg(MVT RetVT,
215 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
476 unsigned ARMFastISel::FastEmitInst_extractsubreg(MVT RetVT,
479 unsigned ResultReg = createResultReg(TLI.getRegClassFor(RetVT));
    [all...]

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