| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 75 setTargetDAGCombine(ISD::SETCC);
281 if (Intr->getOpcode() == ISD::SETCC) {
283 SDNode *SetCC = Intr;
284 assert(SetCC->getConstantOperandVal(1) == 1);
285 assert(cast<CondCodeSDNode>(SetCC->getOperand(2).getNode())->get() ==
287 Intr = SetCC->getOperand(0).getNode();
363 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC);
382 // i1 selectcc(l, r, -1, 0, cc) -> i1 setcc(l, r, cc)
388 return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0),
394 case ISD::SETCC:
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| /external/v8/src/ia32/ |
| disasm-ia32.cc | 361 int SetCC(byte* data);
658 int DisassemblerIA32::SetCC(byte* data) {
1048 data += SetCC(data);
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| /external/v8/src/x64/ |
| disasm-x64.cc | 431 int SetCC(byte* data);
825 int DisassemblerX64::SetCC(byte* data) {
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 70 case ISD::SETCC: Res = PromoteIntRes_SETCC(N); break;
494 // Promote all the way up to the canonical SetCC type.
524 // Get the SETCC result using the canonical SETCC type.
525 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0),
530 return DAG.getNode(ISD::TRUNCATE, dl, NVT, SetCC);
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| DAGCombiner.cpp | 540 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
541 // that selects between the values 1 and 0, making it equivalent to a setcc.
547 if (N.getOpcode() == ISD::SETCC) {
566 // isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
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| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 108 setOperationAction(ISD::SETCC, MVT::i32, Custom);
109 setOperationAction(ISD::SETCC, MVT::i64, Custom);
110 setOperationAction(ISD::SETCC, MVT::f32, Custom);
111 setOperationAction(ISD::SETCC, MVT::f64, Custom);
226 setOperationAction(ISD::SETCC, MVT::f128, Custom);
776 case AArch64ISD::SETCC: return "AArch64ISD::SETCC";
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| /external/v8/src/arm/ |
| constants-arm.h | 273 SetCC = 1 << 20, // Set condition code.
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 173 // X86 is weird, it always uses i8 for shift amounts and setcc results.
462 setOperationAction(ISD::SETCC , MVT::i8 , Custom);
463 setOperationAction(ISD::SETCC , MVT::i16 , Custom);
464 setOperationAction(ISD::SETCC , MVT::i32 , Custom);
465 setOperationAction(ISD::SETCC , MVT::f32 , Custom);
466 setOperationAction(ISD::SETCC , MVT::f64 , Custom);
467 setOperationAction(ISD::SETCC , MVT::f80 , Custom);
470 setOperationAction(ISD::SETCC , MVT::i64 , Custom);
[all...] |
