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    Searched defs:SrcIdx (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/CodeGen/
RegisterCoalescer.h 42 /// SrcIdx - The sub-register index of the old SrcReg in the new coalesced
44 unsigned SrcIdx;
63 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
113 unsigned getSrcIdx() const { return SrcIdx; }
TwoAddressInstructionPass.cpp 121 unsigned SrcIdx, unsigned DstIdx,
    [all...]
  /external/llvm/lib/Transforms/InstCombine/
InstCombineVectorOps.cpp 183 int SrcIdx = SVI->getMaskValue(Elt->getZExtValue());
188 if (SrcIdx < 0)
190 if (SrcIdx < (int)LHSWidth)
193 SrcIdx -= LHSWidth;
199 SrcIdx, false));
  /external/llvm/lib/Target/R600/
AMDILISelDAGToDAG.cpp 376 int SrcIdx = OperandIdx[j];
377 if (SrcIdx < 0)
379 if (RegisterSDNode *Reg = dyn_cast<RegisterSDNode>(Ops[SrcIdx - 1])) {
R600InstrInfo.cpp 183 int SrcIdx = getOperandIdx(MI->getOpcode(), OpTable[j][0]);
184 if (SrcIdx < 0)
186 if (MI->getOperand(SrcIdx).getReg() == AMDGPU::ALU_CONST) {
750 MachineOperand &R600InstrInfo::getFlagOp(MachineInstr *MI, unsigned SrcIdx,
772 switch (SrcIdx) {
783 switch (SrcIdx) {

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