| /external/llvm/lib/CodeGen/ |
| LiveIntervalUnion.cpp | 149 LiveInterval *VReg = LiveUnionI.value();
150 if (VReg != RecentReg && !isSeenInterference(VReg)) {
151 RecentReg = VReg;
152 InterferingVRegs.push_back(VReg);
|
| LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
38 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
40 LiveInterval &LI = LIS.getOrCreateInterval(VReg);
|
| MachineFunction.cpp | 420 unsigned VReg = MRI.getLiveInVirtReg(PReg);
421 if (VReg) {
422 assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!");
423 return VReg;
425 VReg = MRI.createVirtualRegister(RC);
426 MRI.addLiveIn(PReg, VReg);
427 return VReg;
[all...] |
| TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i];
232 SSAUpdate.Initialize(VReg);
236 MachineInstr *DefMI = MRI->getVRegDef(VReg);
240 SSAUpdate.AddAvailableValue(DefBB, VReg);
245 SSAUpdateVals.find(VReg);
253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 98 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
99 // the CopyToReg'd destination register instead of creating a new vreg.
216 // is a vreg in the same register class, use the CopyToReg'd destination
217 // register instead of creating a new vreg.
272 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
275 if (!VReg) {
278 VReg = MRI->createVirtualRegister(RC);
281 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
282 return VReg;
305 unsigned VReg = getVR(Op, VRBaseMap)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 857 unsigned VReg =
859 RegInfo.addLiveIn(VA.getLocReg(), VReg);
860 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
862 unsigned VReg =
864 RegInfo.addLiveIn(VA.getLocReg(), VReg);
865 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 349 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
350 RegInfo.addLiveIn(VA.getLocReg(), VReg);
351 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 208 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
209 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
210 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
320 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
321 MF.getRegInfo().addLiveIn(*CurArgReg, VReg);
322 SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 845 unsigned VReg = MF.addLiveIn(AArch64ArgRegs[i], &AArch64::GPR64RegClass);
846 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64);
864 unsigned VReg = MF.addLiveIn(AArch64FPRArgRegs[i]
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
