1 //===-- llvm/MC/MCTargetAsmParser.h - Target Assembly Parser ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #ifndef LLVM_MC_TARGETPARSER_H 11 #define LLVM_MC_TARGETPARSER_H 12 13 #include "llvm/MC/MCParser/MCAsmParserExtension.h" 14 15 namespace llvm { 16 class MCStreamer; 17 class StringRef; 18 class SMLoc; 19 class AsmToken; 20 class MCParsedAsmOperand; 21 class MCInst; 22 template <typename T> class SmallVectorImpl; 23 24 enum AsmRewriteKind { 25 AOK_Align, // Rewrite align as .align. 26 AOK_DotOperator, // Rewrite a dot operator expression as an immediate. 27 // E.g., [eax].foo.bar -> [eax].8 28 AOK_Emit, // Rewrite _emit as .byte. 29 AOK_Imm, // Rewrite as $$N. 30 AOK_ImmPrefix, // Add $$ before a parsed Imm. 31 AOK_Input, // Rewrite in terms of $N. 32 AOK_Output, // Rewrite in terms of $N. 33 AOK_SizeDirective, // Add a sizing directive (e.g., dword ptr). 34 AOK_Skip // Skip emission (e.g., offset/type operators). 35 }; 36 37 struct AsmRewrite { 38 AsmRewriteKind Kind; 39 SMLoc Loc; 40 unsigned Len; 41 unsigned Val; 42 public: 43 AsmRewrite(AsmRewriteKind kind, SMLoc loc, unsigned len = 0, unsigned val = 0) 44 : Kind(kind), Loc(loc), Len(len), Val(val) {} 45 }; 46 47 struct ParseInstructionInfo { 48 49 SmallVectorImpl<AsmRewrite> *AsmRewrites; 50 51 ParseInstructionInfo() : AsmRewrites(0) {} 52 ParseInstructionInfo(SmallVectorImpl<AsmRewrite> *rewrites) 53 : AsmRewrites(rewrites) {} 54 55 ~ParseInstructionInfo() {} 56 }; 57 58 /// MCTargetAsmParser - Generic interface to target specific assembly parsers. 59 class MCTargetAsmParser : public MCAsmParserExtension { 60 public: 61 enum MatchResultTy { 62 Match_InvalidOperand, 63 Match_MissingFeature, 64 Match_MnemonicFail, 65 Match_Success, 66 FIRST_TARGET_MATCH_RESULT_TY 67 }; 68 69 private: 70 MCTargetAsmParser(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION; 71 void operator=(const MCTargetAsmParser &) LLVM_DELETED_FUNCTION; 72 protected: // Can only create subclasses. 73 MCTargetAsmParser(); 74 75 /// AvailableFeatures - The current set of available features. 76 unsigned AvailableFeatures; 77 78 /// ParsingInlineAsm - Are we parsing ms-style inline assembly? 79 bool ParsingInlineAsm; 80 81 /// SemaCallback - The Sema callback implementation. Must be set when parsing 82 /// ms-style inline assembly. 83 MCAsmParserSemaCallback *SemaCallback; 84 85 public: 86 virtual ~MCTargetAsmParser(); 87 88 unsigned getAvailableFeatures() const { return AvailableFeatures; } 89 void setAvailableFeatures(unsigned Value) { AvailableFeatures = Value; } 90 91 bool isParsingInlineAsm () { return ParsingInlineAsm; } 92 void setParsingInlineAsm (bool Value) { ParsingInlineAsm = Value; } 93 94 void setSemaCallback(MCAsmParserSemaCallback *Callback) { 95 SemaCallback = Callback; 96 } 97 98 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, 99 SMLoc &EndLoc) = 0; 100 101 /// ParseInstruction - Parse one assembly instruction. 102 /// 103 /// The parser is positioned following the instruction name. The target 104 /// specific instruction parser should parse the entire instruction and 105 /// construct the appropriate MCInst, or emit an error. On success, the entire 106 /// line should be parsed up to and including the end-of-statement token. On 107 /// failure, the parser is not required to read to the end of the line. 108 // 109 /// \param Name - The instruction name. 110 /// \param NameLoc - The source location of the name. 111 /// \param Operands [out] - The list of parsed operands, this returns 112 /// ownership of them to the caller. 113 /// \return True on failure. 114 virtual bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name, 115 SMLoc NameLoc, 116 SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0; 117 118 /// ParseDirective - Parse a target specific assembler directive 119 /// 120 /// The parser is positioned following the directive name. The target 121 /// specific directive parser should parse the entire directive doing or 122 /// recording any target specific work, or return true and do nothing if the 123 /// directive is not target specific. If the directive is specific for 124 /// the target, the entire line is parsed up to and including the 125 /// end-of-statement token and false is returned. 126 /// 127 /// \param DirectiveID - the identifier token of the directive. 128 virtual bool ParseDirective(AsmToken DirectiveID) = 0; 129 130 /// mnemonicIsValid - This returns true if this is a valid mnemonic and false 131 /// otherwise. 132 virtual bool mnemonicIsValid(StringRef Mnemonic) = 0; 133 134 /// MatchAndEmitInstruction - Recognize a series of operands of a parsed 135 /// instruction as an actual MCInst and emit it to the specified MCStreamer. 136 /// This returns false on success and returns true on failure to match. 137 /// 138 /// On failure, the target parser is responsible for emitting a diagnostic 139 /// explaining the match failure. 140 virtual bool 141 MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, 142 SmallVectorImpl<MCParsedAsmOperand*> &Operands, 143 MCStreamer &Out, unsigned &ErrorInfo, 144 bool MatchingInlineAsm) = 0; 145 146 /// Allow a target to add special case operand matching for things that 147 /// tblgen doesn't/can't handle effectively. For example, literal 148 /// immediates on ARM. TableGen expects a token operand, but the parser 149 /// will recognize them as immediates. 150 virtual unsigned validateTargetOperandClass(MCParsedAsmOperand *Op, 151 unsigned Kind) { 152 return Match_InvalidOperand; 153 } 154 155 /// checkTargetMatchPredicate - Validate the instruction match against 156 /// any complex target predicates not expressible via match classes. 157 virtual unsigned checkTargetMatchPredicate(MCInst &Inst) { 158 return Match_Success; 159 } 160 161 virtual void convertToMapAndConstraints(unsigned Kind, 162 const SmallVectorImpl<MCParsedAsmOperand*> &Operands) = 0; 163 }; 164 165 } // End llvm namespace 166 167 #endif 168
