| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 371 /// ANY_EXTEND - Used for integer types. The high bits are undefined.
372 ANY_EXTEND,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 95 case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break;
224 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp));
231 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
245 InOp = DAG.getNode(ISD::ANY_EXTEND, dl,
259 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
277 return DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(),
404 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!");
765 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break;
[all...] |
| DAGCombiner.cpp | 761 if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT))
763 return DAG.getNode(ISD::ANY_EXTEND, dl, PVT, Op);
[all...] |
| LegalizeVectorTypes.cpp | 67 case ISD::ANY_EXTEND:
368 case ISD::ANY_EXTEND:
439 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0),
519 case ISD::ANY_EXTEND:
[all...] |
| TargetLowering.cpp | 334 SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND,
616 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
630 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
[all...] |
| SelectionDAGDumper.cpp | 217 case ISD::ANY_EXTEND: return "any_extend";
|
| SelectionDAGBuilder.cpp | 155 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi);
197 return DAG.getNode(ISD::ANY_EXTEND, DL, ValueVT, Val);
294 return DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
323 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
340 ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
511 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
521 Val = DAG.getNode((Smaller ? ISD::TRUNCATE : ISD::ANY_EXTEND),
[all...] |
| LegalizeTypesGeneric.cpp | 219 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0));
|
| LegalizeVectorOps.cpp | 223 case ISD::ANY_EXTEND:
|
| SelectionDAG.cpp | [all...] |
| LegalizeTypes.cpp | [all...] |
| LegalizeDAG.cpp | 444 ISD::ANY_EXTEND, dl, VT, Result);
[all...] |
| LegalizeFloatTypes.cpp | 203 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 173 setOperationAction(ISD::ANY_EXTEND, MVT::v2i64, Expand);
188 setOperationAction(ISD::ANY_EXTEND, MVT::v2f64, Expand);
|
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 502 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86ISelDAGToDAG.cpp | [all...] |
| X86FastISel.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 122 return ISD::ANY_EXTEND;
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 744 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, RegVT, Arg);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 273 // in a twist (e.g. inserting an any_extend which then becomes i64 -> i64).
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 428 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 476 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
