| /external/valgrind/main/VEX/priv/ |
| guest_arm_toIR.c | 153 /* MOD. Initially IRTemp_INVALID. If the r15 branch to be generated
156 IRTemp_INVALID. */
529 register: if guardT == IRTemp_INVALID then the write is
545 if (guardT == IRTemp_INVALID) {
559 vassert(r15guard == IRTemp_INVALID);
570 if guardT == IRTemp_INVALID then the write is unconditional. */
579 if (guardT == IRTemp_INVALID) {
667 register: if guardT == IRTemp_INVALID then the write is
675 if (guardT == IRTemp_INVALID) {
711 writes to the register: if guardT == IRTemp_INVALID then the writ
[all...] |
| guest_amd64_toIR.c | [all...] |
| guest_x86_toIR.c | 764 cas = mkIRCAS( IRTemp_INVALID, oldTmp, Iend_LE, addr,
[all...] |
| guest_ppc_toIR.c | 603 vassert(vEvn && *vEvn == IRTemp_INVALID);
604 vassert(vOdd && *vOdd == IRTemp_INVALID);
621 vassert(vEvn && *vEvn == IRTemp_INVALID);
622 vassert(vOdd && *vOdd == IRTemp_INVALID);
639 vassert(vEvn && *vEvn == IRTemp_INVALID);
640 vassert(vOdd && *vOdd == IRTemp_INVALID);
657 vassert(vEvn && *vEvn == IRTemp_INVALID);
658 vassert(vOdd && *vOdd == IRTemp_INVALID);
678 vassert(t0 && *t0 == IRTemp_INVALID);
679 vassert(t1 && *t1 == IRTemp_INVALID);
[all...] |
| ir_defs.c | 113 if (tmp == IRTemp_INVALID)
114 vex_printf("IRTemp_INVALID");
[all...] |
| host_s390_isel.c | [all...] |
| ir_opt.c | [all...] |
| host_amd64_isel.c | [all...] |
| host_x86_isel.c | [all...] |
| host_mips_isel.c | [all...] |
| host_ppc_isel.c | [all...] |
| host_arm_isel.c | [all...] |
| guest_s390_toIR.c | [all...] |
| /external/valgrind/main/exp-sgcheck/ |
| h_main.c | 485 IRTemp_INVALID if code to compute the shadow has not yet been
489 IRTemp_INVALID, since it is illogical for a shadow tmp itself to be
566 IRTemp_INVALID and we are hoping to read that shadow tmp, it means
581 ent.shadow = IRTemp_INVALID;
650 ent.shadow = IRTemp_INVALID;
|
| /external/valgrind/main/coregrind/ |
| m_translate.c | 125 // - Unused slots have a .temp value of 'IRTemp_INVALID'.
128 // non-IRTemp_INVALID values. This is rare, and the overwriting of a
130 // - Every slot below next_SP_alias_slot holds a non-IRTemp_INVALID value.
151 SP_aliases[i].temp = IRTemp_INVALID;
159 vg_assert(temp != IRTemp_INVALID);
169 vg_assert(IRTemp_INVALID != temp);
191 if (SP_aliases[i].temp == IRTemp_INVALID) {
[all...] |
| /external/valgrind/main/memcheck/ |
| mc_translate.c | 145 and origin (shadowB) values, or these may be IRTemp_INVALID if code
149 and so .shadowV and .shadowB must be IRTemp_INVALID, since it is
229 IRTemp_INVALID and we are hoping to read that shadow tmp, it means
244 ent.shadowV = IRTemp_INVALID;
245 ent.shadowB = IRTemp_INVALID;
261 if (ent->shadowV == IRTemp_INVALID) {
268 tl_assert(ent->shadowV == IRTemp_INVALID);
[all...] |
| /external/valgrind/main/VEX/ |
| test_main.c | 521 Initially all entries are IRTemp_INVALID. Entries are added
569 if (mce->tmpMap[orig] == IRTemp_INVALID) {
[all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_ir.h | 395 #define IRTemp_INVALID ((IRTemp)0xFFFFFFFF)
[all...] |
| /external/valgrind/main/helgrind/ |
| hg_main.c | [all...] |
