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Searched
refs:ImmR
(Results
1 - 4
of
4
) sorted by null
/external/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp
460
unsigned
ImmR
= fieldFromInstruction(Insn, 16, 6);
469
//
ImmR
and ImmS must be between 0 and 31 for 32-bit instructions.
470
if (
ImmR
> 31 || ImmS > 31)
493
if (Opc == SBFM &&
ImmR
== 0) {
496
} else if (Opc == UBFM &&
ImmR
== 0) {
503
if (SF && (ImmS + 1) % 64 ==
ImmR
) {
507
} else if (!SF && (ImmS + 1) % 32 ==
ImmR
) {
515
// of
ImmR
or ImmS is larger.
534
Inst.addOperand(MCOperand::CreateImm(
ImmR
));
538
if (ImmS <
ImmR
)
[
all
...]
/external/llvm/lib/Target/AArch64/InstPrinter/
AArch64InstPrinter.cpp
145
unsigned
ImmR
= ImmROp.getImm();
148
assert(ImmS >=
ImmR
&& "Invalid
ImmR
, ImmS combination for bitfield extract");
150
O << '#' << (ImmS -
ImmR
+ 1);
/external/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.cpp
642
// | N | imms |
immr
| size | R | S |
656
// + Values of 'N', 'imms' and '
immr
' which do not match the above table are
660
// + The 'x' bits in the '
immr
' field are IGNORED.
717
uint32_t
ImmR
= RepeatWidth - Rotation;
728
Bits = ImmS | (
ImmR
<< 6) | (N << 12);
737
uint32_t
ImmR
= (Bits >> 6) & 0x3f;
767
int Rotation = (
ImmR
& (Width - 1));
/external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp
[
all
...]
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