/external/llvm/include/llvm/MC/ |
MCInstBuilder.h | 33 Inst.addOperand(MCOperand::CreateReg(Reg)); 39 Inst.addOperand(MCOperand::CreateImm(Val)); 45 Inst.addOperand(MCOperand::CreateFPImm(Val)); 51 Inst.addOperand(MCOperand::CreateExpr(Val)); 57 Inst.addOperand(MCOperand::CreateInst(Val));
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MCInst.h | 10 // This file contains the declaration of the MCInst and MCOperand classes, which 31 /// MCOperand - Instances of this class represent operands of the MCInst class. 33 class MCOperand { 53 MCOperand() : Kind(kInvalid), FPImmVal(0.0) {} 111 static MCOperand CreateReg(unsigned Reg) { 112 MCOperand Op; 117 static MCOperand CreateImm(int64_t Val) { 118 MCOperand Op; 123 static MCOperand CreateFPImm(double Val) { 124 MCOperand Op [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
AMDGPUMCCodeEmitter.h | 24 class MCOperand; 32 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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/external/llvm/lib/Target/Mips/ |
MipsMCInstLower.h | 19 class MCOperand; 36 MCOperand LowerOperand(const MachineOperand& MO, unsigned offset = 0) const; 39 MCOperand LowerSymbolOperand(const MachineOperand &MO,
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MipsMCInstLower.cpp | 36 MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO, 107 return MCOperand::CreateExpr(MCSym); 114 return MCOperand::CreateExpr(Add); 118 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0, 119 const MCOperand &Opnd1, 120 const MCOperand &Opnd2 = MCOperand()) { 129 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand &MO, 138 return MCOperand::CreateReg(MO.getReg()); 140 return MCOperand::CreateImm(MO.getImm() + offset) [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreMCInstLower.h | 18 class MCOperand; 34 MCOperand LowerOperand(const MachineOperand& MO, unsigned offset = 0) const; 37 MCOperand LowerSymbolOperand(const MachineOperand &MO,
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XCoreMCInstLower.cpp | 35 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO, 71 return MCOperand::CreateExpr(MCSym); 78 return MCOperand::CreateExpr(Add); 81 MCOperand XCoreMCInstLower::LowerOperand(const MachineOperand &MO, 90 return MCOperand::CreateReg(MO.getReg()); 92 return MCOperand::CreateImm(MO.getImm() + offset); 104 return MCOperand(); 112 MCOperand MCOp = LowerOperand(MO);
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/external/llvm/lib/Target/R600/ |
AMDGPUMCInstLower.cpp | 39 MCOperand MCOp; 47 MCOp = MCOperand::CreateFPImm(FloatValue.convertToFloat()); 51 MCOp = MCOperand::CreateImm(MO.getImm()); 54 MCOp = MCOperand::CreateReg(MO.getReg()); 57 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
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/external/llvm/lib/Target/AArch64/ |
AArch64AsmPrinter.h | 25 class MCOperand; 43 bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; 45 MCOperand lowerSymbolOperand(const MachineOperand &MO,
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AArch64MCInstLower.cpp | 30 MCOperand 84 return MCOperand::CreateExpr(Expr); 88 MCOperand &MCOp) const { 95 MCOp = MCOperand::CreateReg(MO.getReg()); 98 MCOp = MCOperand::CreateImm(MO.getImm()); 110 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( 136 MCOperand MCOp;
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/external/llvm/lib/Target/ARM/ |
ARMMCInstLower.cpp | 26 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO, 62 return MCOperand::CreateExpr(Expr); 67 MCOperand &MCOp) { 75 MCOp = MCOperand::CreateReg(MO.getReg()); 78 MCOp = MCOperand::CreateImm(MO.getImm()); 81 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( 104 MCOp = MCOperand::CreateFPImm(Val.convertToDouble()); 121 MCOperand MCOp;
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ARMInstrInfo.cpp | 39 NopInst.addOperand(MCOperand::CreateImm(0)); 40 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 41 NopInst.addOperand(MCOperand::CreateReg(0)); 44 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); 45 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); 46 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); 47 NopInst.addOperand(MCOperand::CreateReg(0)); 48 NopInst.addOperand(MCOperand::CreateReg(0));
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/external/llvm/lib/Target/Hexagon/ |
HexagonMCInstLower.cpp | 27 static MCOperand GetSymbolRef(const MachineOperand& MO, const MCSymbol* Symbol, 38 return (MCOperand::CreateExpr(ME)); 49 MCOperand MCO; 58 MCO = MCOperand::CreateReg(MO.getReg()); 64 MCO = MCOperand::CreateImm(*Val.bitcastToAPInt().getRawData()); 68 MCO = MCOperand::CreateImm(MO.getImm()); 71 MCO = MCOperand::CreateExpr
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/external/llvm/lib/Target/MSP430/ |
MSP430MCInstLower.cpp | 91 MCOperand MSP430MCInstLower:: 106 return MCOperand::CreateExpr(Expr); 115 MCOperand MCOp; 123 MCOp = MCOperand::CreateReg(MO.getReg()); 126 MCOp = MCOperand::CreateImm(MO.getImm()); 129 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create(
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MSP430MCInstLower.h | 19 class MCOperand; 36 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
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/external/llvm/lib/Target/Mips/Disassembler/ |
MipsDisassembler.cpp | 348 Inst.addOperand(MCOperand::CreateReg(Reg)); 359 Inst.addOperand(MCOperand::CreateReg(Reg)); 378 Inst.addOperand(MCOperand::CreateReg(Reg)); 390 Inst.addOperand(MCOperand::CreateReg(Reg)); 398 Inst.addOperand(MCOperand::CreateReg(RegNo)); 414 Inst.addOperand(MCOperand::CreateReg(Reg)); 417 Inst.addOperand(MCOperand::CreateReg(Reg)); 418 Inst.addOperand(MCOperand::CreateReg(Base)); 419 Inst.addOperand(MCOperand::CreateImm(Offset)); 435 Inst.addOperand(MCOperand::CreateReg(Reg)) [all...] |
/external/llvm/lib/Target/X86/Disassembler/ |
X86Disassembler.cpp | 167 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum)); 278 MI.addOperand(MCOperand::CreateExpr(Expr)); 378 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4))); 381 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4))); 413 mcInst.addOperand(MCOperand::CreateImm(immediate)); 444 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break; 474 MCOperand baseReg; 475 MCOperand scaleAmount; 476 MCOperand indexReg; 477 MCOperand displacement [all...] |
/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
HexagonMCInst.h | 21 class MCOperand; 75 const MCOperand& getNewValue() const;
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/external/llvm/lib/Target/MBlaze/ |
MBlazeMCInstLower.h | 19 class MCOperand; 36 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
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MBlazeMCInstLower.cpp | 95 MCOperand MBlazeMCInstLower:: 112 return MCOperand::CreateExpr(Expr); 121 MCOperand MCOp; 127 MCOp = MCOperand::CreateReg(MO.getReg()); 130 MCOp = MCOperand::CreateImm(MO.getImm()); 133 MCOp = MCOperand::CreateExpr(MCSymbolRefExpr::Create( 158 MCOp = MCOperand::CreateImm(Val);
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.cpp | 55 const MCOperand &MOImm = MI->getOperand(OpNum); 94 const MCOperand &Imm12Op = MI->getOperand(OpNum); 118 const MCOperand &MO = MI->getOperand(OpNum); 125 const MCOperand &ImmROp = MI->getOperand(OpNum); 133 const MCOperand &ImmSOp = MI->getOperand(OpNum); 142 const MCOperand &ImmSOp = MI->getOperand(OpNum); 143 const MCOperand &ImmROp = MI->getOperand(OpNum - 1); 156 const MCOperand &CRx = MI->getOperand(OpNum); 165 const MCOperand &ScaleOp = MI->getOperand(OpNum); 173 const MCOperand &MOImm8 = MI->getOperand(OpNum) [all...] |
/external/llvm/lib/Target/MSP430/InstPrinter/ |
MSP430InstPrinter.cpp | 36 const MCOperand &Op = MI->getOperand(OpNo); 48 const MCOperand &Op = MI->getOperand(OpNo); 62 const MCOperand &Base = MI->getOperand(OpNo); 63 const MCOperand &Disp = MI->getOperand(OpNo+1);
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/external/llvm/lib/Target/MBlaze/InstPrinter/ |
MBlazeInstPrinter.cpp | 37 const MCOperand &Op = MI->getOperand(OpNo); 50 const MCOperand &MO = MI->getOperand(OpNo); 59 const MCOperand &MO = MI->getOperand(OpNo);
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/external/llvm/lib/Target/MBlaze/Disassembler/ |
MBlazeDisassembler.cpp | 541 instr.addOperand(MCOperand::CreateReg(RD)); 542 instr.addOperand(MCOperand::CreateReg(RB)); 543 instr.addOperand(MCOperand::CreateReg(RA)); 549 instr.addOperand(MCOperand::CreateReg(RD)); 550 instr.addOperand(MCOperand::CreateReg(RA)); 551 instr.addOperand(MCOperand::CreateReg(RB)); 557 instr.addOperand(MCOperand::CreateReg(RD)); 558 instr.addOperand(MCOperand::CreateReg(RA)); 568 instr.addOperand(MCOperand::CreateReg(RD)); 569 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF)) [all...] |
/external/llvm/lib/Target/ARM/InstPrinter/ |
ARMInstPrinter.cpp | 103 const MCOperand &Dst = MI->getOperand(0); 104 const MCOperand &MO1 = MI->getOperand(1); 105 const MCOperand &MO2 = MI->getOperand(2); 106 const MCOperand &MO3 = MI->getOperand(3); 126 const MCOperand &Dst = MI->getOperand(0); 127 const MCOperand &MO1 = MI->getOperand(1); 128 const MCOperand &MO2 = MI->getOperand(2); 267 MCOperand NewReg; 272 NewReg = MCOperand::CreateReg(MRI.getMatchingSuperReg(Reg, ARM::gsub_0, 290 const MCOperand &Op = MI->getOperand(OpNo) [all...] |