| /external/llvm/lib/CodeGen/ |
| LiveRegMatrix.cpp | 72 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) {
74 << " to " << PrintReg(PhysReg, TRI) << ':');
76 VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
77 MRI->setPhysRegUsed(PhysReg);
78 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
87 unsigned PhysReg = VRM->getPhys(VirtReg.reg);
89 << " from " << PrintReg(PhysReg, TRI) << ':');
91 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
100 unsigned PhysReg) {
111 // The BitVector is indexed by PhysReg, not register unit
[all...] |
| RegAllocFast.cpp | 73 unsigned PhysReg; // Currently held here.
78 : LastUse(0), VirtReg(v), PhysReg(0), LastOpNum(0), Dirty(false) {}
123 // Mark a physreg as used in this instruction.
124 void markRegUsedInInstr(unsigned PhysReg) {
125 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
129 // Check if a physreg or any of its aliases are used in this instruction.
130 bool isRegUsedInInstr(unsigned PhysReg) const {
131 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
177 void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState);
178 unsigned calcSpillCost(unsigned PhysReg) const
[all...] |
| InterferenceCache.h | 39 /// of PhysReg in all basic blocks.
41 /// PhysReg - The register currently represented.
42 unsigned PhysReg;
63 /// RegUnitInfo - Information tracked about each RegUnit in PhysReg.
85 /// Info for each RegUnit in PhysReg. It is very rare ofr a PHysReg to have
96 Entry() : PhysReg(0), Tag(0), RefCount(0), Indexes(0), LIS(0) {}
100 PhysReg = 0;
106 unsigned getPhysReg() const { return PhysReg; }
114 /// valid - Return true if this is a valid entry for physReg
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| RegisterClassInfo.cpp | 94 unsigned PhysReg = RawOrder[i];
96 if (Reserved.test(PhysReg))
98 unsigned Cost = TRI->getCostPerUse(PhysReg);
101 if (CSRNum[PhysReg])
102 // PhysReg aliases a CSR, save it for later.
103 CSRAlias.push_back(PhysReg);
107 RCI.Order[N++] = PhysReg;
116 unsigned PhysReg = CSRAlias[i];
117 unsigned Cost = TRI->getCostPerUse(PhysReg);
120 RCI.Order[N++] = PhysReg;
[all...] |
| AllocationOrder.h | 77 /// Return true if PhysReg is a preferred register.
78 bool isHint(unsigned PhysReg) const {
79 return std::find(Hints.begin(), Hints.end(), PhysReg) != Hints.end();
|
| RegisterCoalescer.h | 57 /// is a physreg. This register class may be a super-register of both
66 /// Create a CoalescerPair representing a virtreg-to-physreg copy.
68 CoalescerPair(unsigned VirtReg, unsigned PhysReg,
70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
|
| VirtRegMap.cpp | 246 // assigned PhysReg must be marked as live-in to those blocks.
247 unsigned PhysReg = VRM->getPhys(VirtReg);
248 assert(PhysReg != VirtRegMap::NO_PHYS_REG && "Unmapped virtual register.");
256 if (!LiveIn[i]->isLiveIn(PhysReg))
257 LiveIn[i]->addLiveIn(PhysReg);
287 unsigned PhysReg = VRM->getPhys(VirtReg);
288 assert(PhysReg != VirtRegMap::NO_PHYS_REG &&
290 assert(!MRI->isReserved(PhysReg) && "Reserved register assignment");
298 SuperKills.push_back(PhysReg);
302 // we are substituting a full physreg. An <imp-use,kill> operan
[all...] |
| InterferenceCache.cpp | 38 InterferenceCache::Entry *InterferenceCache::get(unsigned PhysReg) {
39 unsigned E = PhysRegEntries[PhysReg];
40 if (E < CacheEntries && Entries[E].getPhysReg() == PhysReg) {
56 Entries[E].reset(PhysReg, LIUArray, TRI, MF);
57 PhysRegEntries[PhysReg] = E;
71 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units, ++i)
75 void InterferenceCache::Entry::reset(unsigned physReg,
82 PhysReg = physReg;
88 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
[all...] |
| RegAllocBasic.cpp | 112 bool spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
164 // Spill or split all live virtual registers currently unified under PhysReg
167 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg,
174 for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
186 DEBUG(dbgs() << "spilling " << TRI->getName(PhysReg) <<
190 // Spill each interfering vreg allocated to PhysReg or an alias.
228 while (unsigned PhysReg = Order.next()) {
229 // Check for interference in PhysReg
230 switch (Matrix->checkInterference(VirtReg, PhysReg)) {
232 // PhysReg is available, allocate it
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| RegAllocGreedy.cpp | 181 unsigned PhysReg;
186 // Interference for PhysReg.
194 PhysReg = Reg;
214 /// Candidate info for for each PhysReg in AllocationOrder.
440 unsigned PhysReg;
441 while ((PhysReg = Order.next()))
442 if (!Matrix->checkInterference(VirtReg, PhysReg))
444 if (!PhysReg || Order.isHint())
445 return PhysReg;
447 // PhysReg is available, but there may be a better choice
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| LiveRangeCalc.h | 113 /// PhysReg, when set, is used to verify live-in lists on basic blocks.
117 unsigned PhysReg);
167 /// PhysReg, when set, is used to verify live-in lists on basic blocks.
168 void extend(LiveInterval *LI, SlotIndex Kill, unsigned PhysReg = 0);
|
| LiveRangeCalc.cpp | 137 unsigned PhysReg) {
154 if (findReachingDefs(LI, KillMBB, Kill, PhysReg))
176 unsigned PhysReg) {
196 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
197 !MBB->isLiveIn(PhysReg)) {
|
| MachineRegisterInfo.cpp | 27 // Create the physreg use/def lists.
106 /// clearVirtRegs - Remove all virtual registers (after physreg assignment).
350 bool MachineRegisterInfo::isConstantPhysReg(unsigned PhysReg,
352 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg));
356 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI)
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveRegMatrix.h | 20 // in the physreg.
87 /// assigned to PhysReg or its aliases. This interference could be resolved
97 /// regmask operand that doesn't preserve PhysReg. This typically means
98 /// VirtReg is live across a call, and PhysReg isn't call-preserved.
102 /// Check for interference before assigning VirtReg to PhysReg.
103 /// If this function returns IK_Free, it is legal to assign(VirtReg, PhysReg).
106 InterferenceKind checkInterference(LiveInterval &VirtReg, unsigned PhysReg);
108 /// Assign VirtReg to PhysReg.
110 /// update VirtRegMap. The live range is expected to be available in PhysReg.
111 void assign(LiveInterval &VirtReg, unsigned PhysReg);
[all...] |
| RegisterClassInfo.h | 107 /// overlaps PhysReg, or 0 if Reg doesn't overlap a CSR.
108 unsigned getLastCalleeSavedAlias(unsigned PhysReg) const {
109 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg));
110 if (unsigned N = CSRNum[PhysReg])
|
| MachineRegisterInfo.h | 286 /// isConstantPhysReg - Returns true if PhysReg is unallocatable and constant
288 /// a physreg.
289 bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const;
335 /// clearVirtRegs - Remove all virtual registers (after physreg assignment).
430 /// canReserveReg - Returns true if PhysReg can be used as a reserved
433 bool canReserveReg(unsigned PhysReg) const {
434 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
447 /// isReserved - Returns true when PhysReg is a reserved register.
452 bool isReserved(unsigned PhysReg) const {
453 return getReservedRegs().test(PhysReg);
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| MachineOperand.h | 457 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
461 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
463 assert(PhysReg < (1u << 30) && "Not a physical register");
464 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
467 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
468 bool clobbersPhysReg(unsigned PhysReg) const {
469 return clobbersPhysReg(getRegMask(), PhysReg);
648 /// mask has a bit set for each physreg that is preserved by this
652 /// Any physreg with a 0 bit in the mask is clobbered by the instruction
[all...] |
| /external/llvm/utils/TableGen/ |
| FastISelEmitter.cpp | 404 std::string PhysReg;
407 return PhysReg;
411 return PhysReg;
413 PhysReg += cast<StringInit>(OpLeafRec->getValue("Namespace")->getValue())
415 PhysReg += "::";
416 PhysReg += Target.getRegBank().getReg(OpLeafRec)->getName();
417 return PhysReg;
519 std::string PhysReg = PhyRegForNode(InstPatNode->getChild(i), Target);
520 if (PhysReg.empty()) {
530 PhysRegInputs->push_back(PhysReg);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 113 unsigned &PhysReg, int &Cost) {
126 PhysReg = Reg;
468 unsigned PhysReg = 0;
471 CheckForPhysRegDependency(OpN, N, i, TRI, TII, PhysReg, Cost);
472 assert((PhysReg == 0 || !isChain) &&
473 "Chain dependence via physreg data?");
480 PhysReg = 0;
489 : SDep(OpSU, SDep::Data, PhysReg);
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
