| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Filt_6k_7k_neon.s | 65 VLD1.S16 {Q6, Q7}, [r7]! @ signal[48] ~ signal[63]
74 VSHR.S16 Q10, Q6, #2
95 VLD1.S16 {Q6, Q7}, [r4]! @x[16] ~ X[31]
110 VEXT.8 Q5,Q5,Q6,#2
115 VEXT.8 Q6,Q6,Q7,#2
132 VEXT.8 Q5,Q5,Q6,#2
137 VEXT.8 Q6,Q6,Q7,#2
154 VEXT.8 Q5,Q5,Q6,#
[all...] |
| Dot_p_neon.s | 42 VLD1.S16 {Q6, Q7}, [r0]! @load 16 Word16 x[]
79 VLD1.S16 {Q6, Q7}, [r0]!
|
| Norm_Corr_neon.s | 76 VLD1.S16 {Q6, Q7}, [r14]!
119 VLD1.S16 {Q6, Q7}, [r12]! @ load 16 x[]
140 VLD1.S16 {Q6, Q7}, [r12]! @ load 16 x[]
|
| pred_lt4_1_neon.s | 56 VLD1.S16 {Q6, Q7}, [r4]! @load 16 x[]
|
| scale_sig_neon.s | 70 VLD1.S16 {Q6, Q7}, [r5]! @load 16 Word16 x[]
|
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
| Radix4FFT_v7.s | 96 VQDMULH.S32 Q10, Q6, Q14 @ MULHIGH(cosx, t0)
99 VQDMULH.S32 Q13, Q6, Q15 @ MULHIGH(sinx, t0)
101 VADD.S32 Q6, Q10, Q11 @ MULHIGH(cosx, t0) + MULHIGH(sinx, t1)
104 VADD.S32 Q4, Q8, Q6 @ r4 = t0 + r6@
106 VSUB.S32 Q6, Q8, Q6 @ r6 = t0 - r6@
110 VADD.S32 Q9, Q1, Q6 @ xptr[1] = r1 + r6@
120 VSUB.S32 Q9, Q1, Q6 @ xptr[1] = r1 - r6@
|
| PrePostMDCT_v7.s | 48 VREV64.32 Q9, Q6
109 VREV64.32 Q8, Q6
|
| /bionic/libm/upstream-freebsd/lib/msun/bsdsrc/ |
| b_tgamma.c | 108 #define Q6 -1.76012741431666995019222898833e-03
254 q = Q0 +z*(Q1+z*(Q2+z*(Q3+z*(Q4+z*(Q5+z*(Q6+z*(Q7+z*Q8)))))));
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_PredictIntraChroma_8x8_s.s | 122 qLeftDiff QN Q6.S16
142 qC4 QN Q6.S16
150 qSum4 QN Q6.S16
|
| omxVCM4P10_TransformDequantLumaDCFromPair_s.s | 102 qRound3 QN Q6.S32
|
| omxVCM4P10_PredictIntra_16x16_s.s | 76 qB QN Q6.S16
80 qB1 QN Q6.S16
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm/ |
| h264bsdWriteMacroblock.s | 41 qRow6 QN Q6.U8
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm_neon_asm_gcc/ |
| h264bsdWriteMacroblock.S | 43 #define qRow6 Q6.U8
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 336 qRes2 QN Q6.S16
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon.S | 61 vmovl.u8 q6, d30
454 vsubl.u8 Q6, d14, d8 @ U to 16 bit - 128 = Q6 // U(n, n+1, n+2,n+3)
548 vsubl.u8 Q6, d14, d8 @ U to 16 bit - 128 = Q6 // U(n, n+1, n+2,n+3)
817 vmovl.u8 q6, d3
818 vsub.i16 q6, q7, q6 // q6 = 1 - src.a
835 vmla.i16 q12, q8, q6
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 417 case ARM::Q4: case ARM::Q5: case ARM::Q6: case ARM::Q7:
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 788 AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
[all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
