| /external/valgrind/main/memcheck/tests/amd64-linux/ |
| int3-amd64.stdout.exp | 2 in int_handler, RIP is ...
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/sys/ |
| reg.h | 44 # define RIP 16
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 44 # define RIP 16
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sys/ |
| reg.h | 44 # define RIP 16
|
| /external/kernel-headers/original/asm-x86/ |
| ptrace-abi.h | 47 #define RIP 128
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/asm/ |
| ptrace-abi.h | 47 #define RIP 128
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 47 #define RIP 128
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 47 #define RIP 128
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 57 #define RIP 128
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 57 #define RIP 128
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 57 #define RIP 128
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 57 #define RIP 128
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 57 #define RIP 128
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.cpp | 254 ? X86::RIP // Should have dwarf #16.
299 MachineLocation CSSrc(is64Bit ? X86::RIP : X86::EIP);
315 // Win64 requires rip-rel addressing, thus we force it to PIC. Otherwise we
|
| X86AsmBackend.cpp | 239 // Check if it has an expression and is not RIP relative.
247 if (Op.isReg() && Op.getReg() == X86::RIP)
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 60 ? X86::RIP : X86::EIP),
64 ? X86::RIP : X86::EIP)),
314 Reserved.set(X86::RIP);
315 for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I)
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| X86MCInstLower.cpp | 242 // LEAs can use RIP-relative addressing, and RIP has no sub/super register.
243 if (Reg == 0 || Reg == X86::RIP) continue;
652 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base
|
| X86CodeEmitter.cpp | 437 // But it's probably not beneficial. If the MCE supports using RIP directly
439 // 89 05 00 00 00 00 mov %eax,0(%rip) # PC-relative
491 // Handle %rip relative addressing.
492 if (BaseReg == X86::RIP ||
493 (Is64BitMode && DispForReloc)) { // [disp32+RIP] in X86-64 mode
495 "Invalid rip-relative address");
503 // while others, unless explicit asked to use RIP, use absolute references.
507 // If no BaseReg, issue a RIP relative instruction only if the MCE can
511 if (BaseReg != 0 && BaseReg != X86::RIP)
521 // byte to emit an addr that is just 'disp32' (the non-RIP relative form)
[all...] |
| X86AsmPrinter.cpp | 276 // If we really don't want to print out (rip), don't.
278 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
279 BaseReg.getReg() == X86::RIP)
428 O << "(%rip)";
510 printMemReference(MI, OpNo, O, "no-rip");
|
| X86FastISel.cpp | 503 // RIP-relative addresses can't have additional register operands, so if
524 // Use rip-relative addressing if we can. Above we verified that the
527 AM.Base.Reg = X86::RIP;
556 StubAM.Base.Reg = X86::RIP;
636 // RIP-relative addresses can't have additional register operands.
656 // Use rip-relative addressing if we can. Above we verified that the
659 AM.Base.Reg = X86::RIP;
[all...] |
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 116 GENOFFSET(AMD64,amd64,RIP);
|
| /external/llvm/lib/Transforms/ObjCARC/ |
| ObjCARCOpts.cpp | [all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 291 ENTRY(RIP)
|
| X86Disassembler.cpp | 284 /// referenced by a load instruction with the base register that is the rip.
560 baseReg = MCOperand::CreateReg(X86::RIP); // Section 2.2.1.6
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-amd64-linux.c | 362 SC2(rip,RIP);
529 "next %%RIP = %#llx, status=%d\n",
587 tst->arch.vex.guest_RIP = sc->rip;
630 "VG_(signal_return) (thread %d): isRT=%d valid magic; RIP=%#llx\n",
|
