| /bionic/libc/kernel/arch-x86/asm/ |
| rwlock.h | 21 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 34 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| rwlock.h | 21 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 34 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /external/kernel-headers/original/asm-x86/ |
| rwlock.h | 4 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 18 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| rwlock.h | 15 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 29 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| rwlock.h | 15 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 29 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| rwlock.h | 15 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 29 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| rwlock.h | 15 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 29 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| rwlock.h | 15 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 29 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/8/platforms/android-14/arch-x86/usr/include/asm/ |
| rwlock.h | 21 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 34 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /prebuilts/ndk/8/platforms/android-9/arch-x86/usr/include/asm/ |
| rwlock.h | 21 #define RW_LOCK_BIAS 0x01000000
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| spinlock_types.h | 34 #define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS }
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| /bionic/libc/kernel/arch-arm/asm/ |
| locks.h | 26 #define RW_LOCK_BIAS 0x01000000
29 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
30 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
39 #define RW_LOCK_BIAS 0x01000000
41 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
42 #define __up_op_write(ptr,wake) ({ __asm__ __volatile__( "@ up_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
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| /development/ndk/platforms/android-3/arch-arm/include/asm/ |
| locks.h | 23 #define RW_LOCK_BIAS 0x01000000
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
42 #define RW_LOCK_BIAS 0x01000000
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
47 #define __up_op_write(ptr,wake) ({ __asm__ __volatile__( "@ up_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
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| /external/kernel-headers/original/asm-arm/ |
| locks.h | 81 #define RW_LOCK_BIAS 0x01000000
97 : "r" (ptr), "I" (RW_LOCK_BIAS) \
115 : "r" (ptr), "I" (RW_LOCK_BIAS) \
209 #define RW_LOCK_BIAS 0x01000000
226 : "r" (ptr), "I" (RW_LOCK_BIAS) \
245 : "r" (ptr), "I" (RW_LOCK_BIAS) \
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| /prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/asm/ |
| locks.h | 23 #define RW_LOCK_BIAS 0x01000000
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
42 #define RW_LOCK_BIAS 0x01000000
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
47 #define __up_op_write(ptr,wake) ({ __asm__ __volatile__( "@ up_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
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| /prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/asm/ |
| locks.h | 23 #define RW_LOCK_BIAS 0x01000000
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
42 #define RW_LOCK_BIAS 0x01000000
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
47 #define __up_op_write(ptr,wake) ({ __asm__ __volatile__( "@ up_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
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