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  /external/llvm/lib/Target/R600/
R600RegisterInfo.cpp 31 BitVector Reserved(getNumRegs());
33 Reserved.set(AMDGPU::ZERO);
34 Reserved.set(AMDGPU::HALF);
35 Reserved.set(AMDGPU::ONE);
36 Reserved.set(AMDGPU::ONE_INT);
37 Reserved.set(AMDGPU::NEG_HALF);
38 Reserved.set(AMDGPU::NEG_ONE);
39 Reserved.set(AMDGPU::PV_X);
40 Reserved.set(AMDGPU::ALU_LITERAL_X);
41 Reserved.set(AMDGPU::ALU_CONST)
    [all...]
SIRegisterInfo.cpp 29 BitVector Reserved(getNumRegs());
30 return Reserved;
  /external/llvm/lib/Target/Sparc/
SparcRegisterInfo.cpp 43 BitVector Reserved(getNumRegs());
44 // FIXME: G1 reserved for now for large imm generation by frame code.
45 Reserved.set(SP::G1);
46 Reserved.set(SP::G2);
47 Reserved.set(SP::G3);
48 Reserved.set(SP::G4);
49 Reserved.set(SP::O6);
50 Reserved.set(SP::I6);
51 Reserved.set(SP::I7);
52 Reserved.set(SP::G0)
    [all...]
  /external/llvm/lib/Target/Mips/
MipsRegisterInfo.cpp 113 BitVector Reserved(getNumRegs());
117 Reserved.set(ReservedCPURegs[I]);
120 Reserved.set(ReservedCPU64Regs[I]);
126 Reserved.set(*Reg);
131 Reserved.set(*Reg);
136 Reserved.set(Mips::S0);
138 Reserved.set(Mips::FP);
139 Reserved.set(Mips::FP_64);
144 Reserved.set(Mips::HWR29);
145 Reserved.set(Mips::HWR29_64)
    [all...]
  /external/llvm/lib/Target/MBlaze/
MBlazeRegisterInfo.cpp 72 BitVector Reserved(getNumRegs());
73 Reserved.set(MBlaze::R0);
74 Reserved.set(MBlaze::R1);
75 Reserved.set(MBlaze::R2);
76 Reserved.set(MBlaze::R13);
77 Reserved.set(MBlaze::R14);
78 Reserved.set(MBlaze::R15);
79 Reserved.set(MBlaze::R16);
80 Reserved.set(MBlaze::R17);
81 Reserved.set(MBlaze::R18)
    [all...]
  /development/tools/recovery_l10n/
Android.mk 1 # Copyright 2012 Google Inc. All Rights Reserved.
  /development/tools/yuv420sp2rgb/
Android.mk 1 # Copyright 2005 Google Inc. All Rights Reserved.
  /external/llvm/lib/Target/AArch64/
AArch64RegisterInfo.cpp 63 BitVector Reserved(getNumRegs());
66 Reserved.set(AArch64::XSP);
67 Reserved.set(AArch64::WSP);
69 Reserved.set(AArch64::XZR);
70 Reserved.set(AArch64::WZR);
73 Reserved.set(AArch64::X29);
74 Reserved.set(AArch64::W29);
77 return Reserved;
  /external/llvm/lib/Target/MSP430/
MSP430RegisterInfo.cpp 78 BitVector Reserved(getNumRegs());
81 // Mark 4 special registers with subregisters as reserved.
82 Reserved.set(MSP430::PCB);
83 Reserved.set(MSP430::SPB);
84 Reserved.set(MSP430::SRB);
85 Reserved.set(MSP430::CGB);
86 Reserved.set(MSP430::PCW);
87 Reserved.set(MSP430::SPW);
88 Reserved.set(MSP430::SRW);
89 Reserved.set(MSP430::CGW)
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.cpp 75 BitVector Reserved(getNumRegs());
76 Reserved.set(HEXAGON_RESERVED_REG_1);
77 Reserved.set(HEXAGON_RESERVED_REG_2);
78 Reserved.set(Hexagon::R29);
79 Reserved.set(Hexagon::R30);
80 Reserved.set(Hexagon::R31);
81 Reserved.set(Hexagon::D14);
82 Reserved.set(Hexagon::D15);
83 Reserved.set(Hexagon::LC0);
84 Reserved.set(Hexagon::LC1)
    [all...]
  /external/icu4c/test/testdata/
tstfiles.mk 1 # Copyright (C) 2007, International Business Machines Corporation and others. All Rights Reserved.
  /external/llvm/lib/Target/X86/
X86RegisterInfo.cpp 305 BitVector Reserved(getNumRegs());
308 // Set the stack-pointer register and its aliases as reserved.
309 Reserved.set(X86::RSP);
311 Reserved.set(*I);
313 // Set the instruction pointer register and its aliases as reserved.
314 Reserved.set(X86::RIP);
316 Reserved.set(*I);
318 // Set the frame-pointer register and its aliases as reserved if needed.
320 Reserved.set(X86::RBP);
322 Reserved.set(*I)
    [all...]
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 73 BitVector Reserved(getNumRegs());
76 Reserved.set(XCore::CP);
77 Reserved.set(XCore::DP);
78 Reserved.set(XCore::SP);
79 Reserved.set(XCore::LR);
81 Reserved.set(XCore::R10);
83 return Reserved;
  /external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 103 BitVector Reserved(getNumRegs());
107 Reserved.set(PPC::R0);
108 Reserved.set(PPC::R1);
109 Reserved.set(PPC::LR);
110 Reserved.set(PPC::LR8);
111 Reserved.set(PPC::RM);
115 Reserved.set(PPC::R2); // System-reserved register
116 Reserved.set(PPC::R13); // Small Data Area pointer register
123 Reserved.set(PPC::R13)
    [all...]
  /external/libppp/src/
chap.h 5 * All rights reserved.
68 char Reserved[8];
  /external/llvm/lib/CodeGen/
RegisterClassInfo.cpp 11 // information about target register classes. Callee saved and reserved
60 // Different reserved registers?
62 if (Reserved.size() != RR.size() || RR != Reserved) {
64 Reserved = RR;
72 /// compute - Compute the preferred allocation order for RC with reserved
78 // Raw register count, including all reserved regs.
95 // Remove reserved registers from the allocation order.
96 if (Reserved.test(PhysReg))
  /development/tools/etc1tool/
Android.mk 1 # Copyright 2009 Google Inc. All Rights Reserved.
  /external/icu4c/
configure.mk 1 # Copyright (c) 2008-2010, International Business Machines Corporation and others. All Rights Reserved.
  /external/icu4c/test/perf/unisetperf/draft/
contperf.bat 2 rem others. All Rights Reserved.
span16perf.bat 2 rem others. All Rights Reserved.
span8perf.bat 2 rem others. All Rights Reserved.
  /external/icu4c/test/perf/utrie2perf/
utrie2perf.bat 2 rem All Rights Reserved.
  /external/llvm/lib/Target/NVPTX/
NVPTXRegisterInfo.cpp 118 BitVector Reserved(getNumRegs());
119 return Reserved;
  /external/openfst/
Android.mk 1 # Copyright 2012 Google Inc. All Rights Reserved.
  /external/freetype/include/freetype/
tttables.h 159 /* Reserved :: 8~reserved bytes. */
196 FT_Short Reserved[4];
281 /* This value is `reserved' in vmtx */
284 /* Reserved :: 8~reserved bytes. */
322 FT_Short Reserved[4];
457 FT_Byte Reserved;
    [all...]

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