| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 147 case ISD::SDIV:
155 if (N->getOpcode() == ISD::SDIV) {
165 unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr;
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 188 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 113 setOperationAction(ISD::SDIV, VT, Custom);
169 setOperationAction(ISD::SDIV, MVT::v2i64, Expand);
|
| AMDGPUISelLowering.cpp | 101 case ISD::SDIV: return LowerSDIV(Op, DAG);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 161 case ISD::SDIV: return "sdiv";
|
| FastISel.cpp | 412 // Transform "sdiv exact X, 8" -> "sra X, 3".
413 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) &&
[all...] |
| LegalizeVectorOps.cpp | 15 // ISD::SDIV of type v2i64 on x86-32. The type is legal (for example, addition
16 // on a v2i64 is legal), but ISD::SDIV isn't legal, so we have to unroll the
196 case ISD::SDIV:
|
| LegalizeVectorTypes.cpp | 107 case ISD::SDIV:
559 case ISD::SDIV:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 109 case ISD::SDIV:
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 157 setOperationAction(ISD::SDIV, MVT::i8, Expand);
163 setOperationAction(ISD::SDIV, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 123 setOperationAction(ISD::SDIV, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 767 case ISD::SDIV:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 349 setOperationAction(ISD::SDIV, VT, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 365 setOperationAction(ISD::SDIV, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 270 setOperationAction(ISD::SDIV, MVT::i32, Expand);
274 setOperationAction(ISD::SDIV, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 144 setOperationAction(ISD::SDIV, VT, Expand);
549 setOperationAction(ISD::SDIV, MVT::v4i16, Custom);
550 setOperationAction(ISD::SDIV, MVT::v8i8, Custom);
681 setOperationAction(ISD::SDIV, MVT::i32, Expand);
[all...] |
