| /external/eigen/Eigen/src/Geometry/arch/ |
| Geometry_SSE.h | 19 struct quat_product<Architecture::SSE, Derived, OtherDerived, float, Aligned>
41 struct cross3_impl<Architecture::SSE,VectorLhs,VectorRhs,float,true>
60 struct quat_product<Architecture::SSE, Derived, OtherDerived, double, Aligned>
|
| /external/libvpx/libvpx/vp8/encoder/ppc/ |
| csystemdependent.c | 58 extern unsigned int vp8_get8x8var_c(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
118 extern unsigned int vp8_get8x8var_ppc(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
119 extern unsigned int vp8_get16x16var_ppc(unsigned char *src_ptr, int source_stride, unsigned char *ref_ptr, int recon_stride, unsigned int *SSE, int *Sum);
|
| /external/eigen/Eigen/src/Core/util/ |
| Constants.h | 400 SSE = 0x1,
403 Target = SSE
|
| /external/oprofile/events/i386/atom/ |
| unit_masks | 10 0x01 prefetcht0 Streaming SIMD Extensions (SSE) PrefetchT0 instructions executed
11 0x06 sw_l2 Streaming SIMD Extensions (SSE) PrefetchT1 and PrefetchT2 instructions executed
12 0x08 prefetchnta Streaming SIMD Extensions (SSE) Prefetch NTA instructions executed
85 0x01 packed_single Retired Streaming SIMD Extensions (SSE) packed-single instructions
86 0x02 scalar_single Retired Streaming SIMD Extensions (SSE) scalar-single instructions
92 0x01 packed_single Retired computational Streaming SIMD Extensions (SSE) packed-single instructions
93 0x02 scalar_single Retired computational Streaming SIMD Extensions (SSE) scalar-single instructions
|
| events | 15 event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions executed
71 event:0xC7 counters:0,1 um:simd_inst_retired minimum:6000 name:SIMD_INST_RETIRED : Retired Streaming SIMD Extensions (SSE) instructions
73 event:0xCA counters:0,1 um:simd_comp_inst_retired minimum:6000 name:SIMD_COMP_INST_RETIRED : Retired computational Streaming SIMD Extensions (SSE) instructions.
|
| /external/libvpx/libvpx/vp8/common/x86/ |
| variance_ssse3.c | 22 unsigned int *SSE,
76 unsigned int *sse
115 *sse = xxsum0;
127 unsigned int *sse
164 *sse = xxsum0;
|
| variance_sse2.c | 40 unsigned int *SSE,
54 unsigned int *SSE,
63 unsigned int *SSE,
144 unsigned int *sse)
150 *sse = var;
161 unsigned int *sse)
167 *sse = var;
179 unsigned int *sse)
186 *sse = sse0;
194 unsigned int *sse)
[all...] |
| variance_mmx.c | 45 unsigned int *SSE,
54 unsigned int *SSE,
87 unsigned int *sse)
93 *sse = var;
103 unsigned int *sse)
109 *sse = var;
120 unsigned int *sse)
132 *sse = var;
142 unsigned int *sse)
155 *sse = var
[all...] |
| variance_impl_sse2.asm | 80 ; unsigned int * SSE,
126 pxor xmm6, xmm6 ; clear xmm6 for accumulating sse
200 mov rdi, arg(4) ;[SSE]
224 ; unsigned int * SSE,
385 mov rdi, arg(4) ;[SSE]
710 pxor xmm7, xmm7 ; sse eaccumulator
827 pxor xmm7, xmm7 ; sse eaccumulator
906 mov rdi, arg(6) ;[SSE]
948 pxor xmm7, xmm7 ; sse eaccumulator
[all...] |
| variance_impl_mmx.asm | 72 ; unsigned int *SSE,
295 mov rsi, arg(4) ;SSE
320 ; unsigned int *SSE,
410 mov rsi, arg(4) ;SSE
[all...] |
| variance_impl_ssse3.asm | 336 mov rdi, arg(8) ;[SSE]
|
| subpixel_ssse3.asm | 25 ; This is an implementation of some of the SSE optimizations first seen in ffvp8
[all...] |
| /external/oprofile/events/x86-64/family10/ |
| unit_masks | 50 0x01 Add pipe ops excluding load ops and SSE move ops
51 0x02 Multiply pipe ops excluding load ops and SSE move ops
52 0x04 Store pipe ops excluding load ops and SSE move ops
53 0x08 Add pipe load ops and SSE move ops
54 0x10 Multiply pipe load ops and SSE move ops
55 0x20 Store pipe load ops and SSE move ops
68 0x04 SSE instructions (SSE, SSE2, SSE3, and SSE4A)
75 0x02 SSE retype microfaults
76 0x04 SSE reclass microfault
[all...] |
| /external/oprofile/events/x86-64/family11h/ |
| unit_masks | 63 0x04 Packed SSE & SSE2 instructions
64 0x08 Packed scalar SSE & SSE2 instructions
71 0x02 SSE retype microfaults
72 0x04 SSE reclass microfaults
73 0x08 SSE and x87 microtraps
|
| /external/oprofile/events/x86-64/hammer/ |
| unit_masks | 57 0x04 Combined packed SSE & SSE2 instructions
58 0x08 Combined packed scalar SSE & SSE2 instructions
65 0x02 SSE retype microfaults
66 0x04 SSE reclass microfaults
67 0x08 SSE and x87 microtraps
|
| /external/oprofile/events/i386/westmere/ |
| unit_masks | 84 0x04 sse_fp SSE and SSE2 FP Uops
86 0x10 sse_fp_packed SSE FP packed Uops
87 0x20 sse_fp_scalar SSE FP scalar Uops
88 0x40 sse_single_precision SSE* FP single precision Uops
89 0x80 sse_double_precision SSE* FP double precision Uops
|
| /external/webp/src/enc/ |
| filter.c | 300 const double SSE = iw2 * (sxx + syy - 2. * sxy);
301 if (SSE > kMinValue) return SSE;
|
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | 770 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
[all...] |
| /external/libvpx/libvpx/vp8/common/ppc/ |
| variance_altivec.asm | 64 ;# Now compute sse.
98 stw r4, 0(r7) ;# sse
102 subf r3, r3, r4 ;# sse - ((sum*sum) >> DS)
142 stw r4, 0(r7) ;# sse
146 subf r3, r3, r4 ;# sse - ((sum*sum) >> 8)
154 ;# r7 unsigned int *SSE
176 ;# r7 unsigned int *SSE
197 ;# r7 unsigned int *sse
214 ;# Now compute sse.
231 stw r3, 0(r7) ;# sse
[all...] |
| /external/speex/libspeex/ |
| arch.h | 53 #error SSE is only for floating-point
|
| /external/eigen/Eigen/src/LU/arch/ |
| Inverse_SSE.h | 12 // The SSE code for the 4x4 float and double matrix inverse in this file
35 struct compute_inverse_size4<Architecture::SSE, float, MatrixType, ResultType>
163 struct compute_inverse_size4<Architecture::SSE, double, MatrixType, ResultType>
|
| /external/ceres-solver/docs/ |
| faq.tex | 14 Most non-linear solvers we are aware of, define the problem and residuals in terms of scalars and it is possible to do this with Ceres also. However, it is our experience that in most problems small groups of scalars occur together. For example the three components of a translation vector and the four components of the quaternion that define the pose of a camera. Same is true for residuals, where it is common to have small vectors of residuals rather than just scalars. There are a number of advantages of using blocks. It saves on indexing information, which for large problems can be substantial. Blocks translate into contiguous storage in memory which is more cache friendly and last but not the least, it allows us to use SIMD/SSE based BLAS routines to significantly speed up various matrix operations.
|
| changes.tex | 198 \item Enable SSE support on MacOS
|
| /external/oprofile/events/i386/nehalem/ |
| events | 51 event:0x4B counters:0,1,2,3 um:sse_mem_exec minimum:6000 name:SSE_MEM_EXEC : Counts number of SSE instructions which missed the L1 data cache.
52 event:0x4C counters:0,1,2,3 um:one minimum:6000 name:LOAD_HIT_PRE : Counts load operations sent to the L1 data cache while a previous SSE prefetch instruction to the same cache line has started prefetching but has not yet finished.
|
| /external/elfutils/tests/ |
| run-allregs.sh | 63 SSE registers:
119 SSE registers:
[all...] |
