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Searched
refs:SecondLastOpc
(Results
1 - 5
of
5
) sorted by null
/external/llvm/lib/Target/Mips/
MipsInstrInfo.cpp
217
unsigned
SecondLastOpc
= 0;
222
SecondLastOpc
= GetAnalyzableBrOpc(SecondLastInst->getOpcode());
225
if (isUnpredicatedTerminator(SecondLastInst) && !
SecondLastOpc
)
230
if (!
SecondLastOpc
) {
251
if (
SecondLastOpc
== UncondBrOpc) {
267
AnalyzeCondBr(SecondLastInst,
SecondLastOpc
, TBB, Cond);
/external/llvm/lib/Target/XCore/
XCoreInstrInfo.cpp
235
unsigned
SecondLastOpc
= SecondLastInst->getOpcode();
236
XCore::CondCode BranchCode = GetCondFromBranchOpc(
SecondLastOpc
);
/external/llvm/lib/Target/AArch64/
AArch64InstrInfo.cpp
211
unsigned
SecondLastOpc
= SecondLastInst->getOpcode();
216
while (
SecondLastOpc
== AArch64::Bimm) {
226
SecondLastOpc
= SecondLastInst->getOpcode();
237
if (
SecondLastOpc
== AArch64::Bcc) {
243
} else if (isCondBranch(
SecondLastOpc
)) {
252
if (
SecondLastOpc
== AArch64::Bimm && LastOpc == AArch64::Bimm) {
/external/llvm/lib/Target/R600/
R600InstrInfo.cpp
278
unsigned
SecondLastOpc
= SecondLastInst->getOpcode();
281
if (
SecondLastOpc
== AMDGPU::JUMP_COND && LastOpc == AMDGPU::JUMP) {
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
311
unsigned
SecondLastOpc
= SecondLastInst->getOpcode();
316
while (isUncondBranchOpcode(
SecondLastOpc
)) {
326
SecondLastOpc
= SecondLastInst->getOpcode();
336
if (isCondBranchOpcode(
SecondLastOpc
) && isUncondBranchOpcode(LastOpc)) {
346
if (isUncondBranchOpcode(
SecondLastOpc
) && isUncondBranchOpcode(LastOpc)) {
357
if ((isJumpTableBranchOpcode(
SecondLastOpc
) ||
358
isIndirectBranchOpcode(
SecondLastOpc
)) &&
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