/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeFloatTypes.cpp | 669 DAG.getCondCode(CCCode), NewLHS, NewRHS, [all...] |
LegalizeIntegerTypes.cpp | [all...] |
TargetLowering.cpp | 191 NewLHS, NewRHS, DAG.getCondCode(CCCode)); 194 NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2))); [all...] |
LegalizeDAG.cpp | [all...] |
SelectionDAG.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 472 DAG.getCondCode(ISD::SETNE) 557 CC = DAG.getCondCode(ISD::getSetCCInverse(CCOpcode, CompareVT == MVT::i32)); 612 DAG.getCondCode(CCOpcode)); 645 DAG.getCondCode(ISD::SETNE)); 656 DAG.getCondCode(ISD::SETNE)); [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | 484 SDValue getCondCode(ISD::CondCode Cond); 617 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond)); 626 LHS, RHS, True, False, getCondCode(Cond)); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/AsmParser/ |
AArch64AsmParser.cpp | 240 A64CC::CondCodes getCondCode() const { 810 Inst.addOperand(MCOperand::CreateImm(getCondCode())); 837 unsigned Encoded = A64InvertCondCode(getCondCode()); [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 526 ARMCC::CondCodes getCondCode() const { [all...] |