| /bionic/libc/kernel/arch-mips/asm/mips-boards/ |
| generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
|
| malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/mips-boards/ |
| generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
|
| malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
|
| /external/kernel-headers/original/asm-mips/mips-boards/ |
| generic.h | 72 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
88 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
|
| malta.h | 37 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
44 return (unsigned long) ioremap (((addr & 0xffff) << 21), 0x10000);
51 return (unsigned long) ioremap(addr, 0x10000);
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/mips-boards/ |
| generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
|
| malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/mips-boards/ |
| generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f)
64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
|
| malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
|
| /bionic/libc/kernel/arch-mips/asm/ |
| io.h | 36 #include <ioremap.h>
67 #define ioremap(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) macro
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| io.h | 36 #include <ioremap.h>
67 #define ioremap(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) macro
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| io.h | 36 #include <ioremap.h>
67 #define ioremap(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) macro
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| io.h | 36 #include <ioremap.h>
67 #define ioremap(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) macro
|
| /external/kernel-headers/original/asm-mips/ |
| io.h | 29 #include <ioremap.h>
218 * ioremap - map bus memory into CPU space
222 * ioremap performs a platform specific sequence of operations to
228 #define ioremap(offset, size) \ macro
242 * This version of ioremap ensures that the memory is marked uncachable
264 * This version of ioremap ensures that the memory is marked cachable by
272 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
|
| /external/kernel-headers/original/asm-arm/ |
| io.h | 58 * Architecture ioremap implementation.
159 * These perform PCI memory accesses via an ioremap region. They don't
229 * ioremap and friends.
231 * ioremap takes a PCI memory address, as specified in
236 #define ioremap(cookie,size) __ioremap(cookie,size,0) macro
241 #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) macro
|
| /external/kernel-headers/original/asm-x86/ |
| io_32.h | 106 * ioremap - map bus memory into CPU space
110 * ioremap performs a platform specific sequence of operations to
120 static inline void __iomem * ioremap(unsigned long offset, unsigned long size) function
130 * mappings, before the real ioremap() is functional.
222 * explicitly ioremap() it. The fact that the ISA IO space is mapped
|
