| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_STRING_COMPARETO.S | 72 lhu t0, 0(a0)
73 lhu t1, 0(a1)
78 lhu t2, 2(a0)
79 lhu t3, 2(a1)
92 lhu t0, 0(a0)
93 lhu t1, 0(a1)
98 lhu t2, 2(a0)
99 lhu t3, 2(a1)
104 lhu t4, 4(a0)
105 lhu t5, 4(a1
[all...] |
| TEMPLATE_STRING_INDEXOF.S | 66 lhu t0, 0(v0)
68 lhu t0, 2(v0)
70 lhu t0, 4(v0)
72 lhu t0, 6(v0)
83 lhu t0, 0(v0)
|
| header.S | 155 #define FETCH_INST() lhu rINST, (rPC)
157 #define FETCH_ADVANCE_INST(_count) lhu rINST, (_count*2)(rPC); \
161 lhu rINST, (rPC)
163 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC)
260 #define LOADu2_RB_OFF(rd,rbase,off) lhu rd, off(rbase)
|
| footer.S | 17 lhu ra, offThread_subMode(rSELF)
|
| /bionic/libc/arch-mips/bionic/ |
| memcmp16.S | 44 1: lhu $t0,0($a0)
45 lhu $t1,0($a1)
|
| /external/llvm/test/MC/Mips/ |
| mips-memory-instructions.s | 31 # CHECK: lhu $4, 4($5) # encoding: [0x04,0x00,0xa4,0x94]
41 lhu $4, 4($5)
|
| /dalvik/vm/mterp/mips/ |
| OP_INVOKE_OBJECT_INIT_RANGE.S | 26 lhu a1, offThread_subMode(rSELF)
|
| header.S | 77 #define FETCH_INST() lhu rINST, (rPC)
79 #define FETCH_ADVANCE_INST(_count) lhu rINST, ((_count)*2)(rPC); \
83 lhu _dreg, ((_count)*2)(_sreg) ; \
87 lhu rINST, (rPC)
89 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC)
189 #define LOADu2_RB_OFF(rd, rbase, off) lhu rd, off(rbase)
|
| footer.S | 381 lhu a0, offThread_subMode(rSELF)
492 lhu a1, offThread_subMode(rSELF)
528 lhu a1, offThread_subMode(rSELF)
590 lhu rOBJ, offMethod_registersSize(a0)
591 lhu a3, offMethod_outsSize(a0)
602 lhu ra, offThread_subMode(rSELF)
623 lhu rOBJ, (a2) # rOBJ -< load Inst from New PC
667 lhu ra, offThread_subMode(rSELF)
761 lhu t0, offThread_subMode(rSELF)
840 lhu a2, offThread_subMode(rSELF
[all...] |
| OP_INVOKE_STATIC.S | 37 lhu a2, offThread_subMode(rSELF)
|
| OP_EXECUTE_INLINE.S | 17 lhu a2, offThread_subMode(rSELF)
|
| OP_EXECUTE_INLINE_RANGE.S | 15 lhu a2, offThread_subMode(rSELF)
|
| /external/llvm/test/MC/MBlaze/ |
| mblaze_memory.s | 24 # CHECK: lhu
27 lhu r1, r2, r3
|
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 162 #define FETCH_INST() lhu rINST, (rPC)
164 #define FETCH_ADVANCE_INST(_count) lhu rINST, (_count*2)(rPC); \
168 lhu rINST, (rPC)
170 #define FETCH(rd, _count) lhu rd, (_count * 2)(rPC)
267 #define LOADu2_RB_OFF(rd,rbase,off) lhu rd, off(rbase)
[all...] |
| /system/core/libpixelflinger/arch-mips/ |
| t32cb16blend.S | 192 lhu $t3,-2($a0)
251 lhu $t3,-2($a0)
|
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | 215 LHU
216 lhu $t0, 0($t1) :: rt 0x00001e1f
217 lhu $t0, 4($t1) :: rt 0x00000000
218 lhu $t0, 8($t1) :: rt 0x00000003
219 lhu $t0, 12($t1) :: rt 0x0000ffff
220 lhu $t0, 16($t1) :: rt 0x00002e2f
221 lhu $t0, 20($t1) :: rt 0x00002b2b
222 lhu $t0, 24($t1) :: rt 0x00002e2b
223 lhu $t0, 28($t1) :: rt 0x00002d2a
224 lhu $t0, 32($t1) :: rt 0x00003f3
[all...] |
| /external/v8/src/mips/ |
| regexp-macro-assembler-mips.cc | 261 __ lhu(a1, MemOperand(a0, 0));
433 __ lhu(a3, MemOperand(a0, 0));
435 __ lhu(t0, MemOperand(a2, 0));
[all...] |
| codegen-mips.cc | 440 __ lhu(result, MemOperand(at));
|
| assembler-mips.h | 747 void lhu(Register rd, const MemOperand& rs);
[all...] |
| assembler-mips.cc | 1379 void Assembler::lhu(Register rd, const MemOperand& rs) { function in class:v8::Assembler
[all...] |
| stub-cache-mips.cc | [all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 616 m_assembler.lhu(dest, address.base, address.offset);
621 lhu dest, (offset & 0xffff)(addrTemp)
625 m_assembler.lhu(dest, addrTempRegister, address.offset);
637 lhu dest, address.offset(addrTemp)
641 m_assembler.lhu(dest, addrTempRegister, address.offset);
648 lhu dest, (address.offset & 0xffff)(addrTemp)
655 m_assembler.lhu(dest, addrTempRegister, address.offset);
[all...] |
| MIPSAssembler.h | 441 void lhu(RegisterID rt, RegisterID rs, int offset) function in class:JSC::MIPSAssembler
|
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 84 #define FETCH_INST() lhu rINST, (rPC)
86 #define FETCH_ADVANCE_INST(_count) lhu rINST, ((_count)*2)(rPC); \
90 lhu _dreg, ((_count)*2)(_sreg) ; \
94 lhu rINST, (rPC)
96 #define FETCH(rd, _count) lhu rd, ((_count) * 2)(rPC)
196 #define LOADu2_RB_OFF(rd, rbase, off) lhu rd, off(rbase)
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 508 // lhu with negative data.
509 __ lhu(t3, MemOperand(a0, OFFSET_OF(T, si)) );
520 __ lhu(t5, MemOperand(a0, OFFSET_OF(T, si)) );
[all...] |
