| /dalvik/vm/compiler/codegen/x86/ |
| NcgAot.cpp | 44 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
55 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
73 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
90 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
102 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
166 move_imm_to_reg(size, dataAddr, reg, isPhysical);
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| LowerReturn.cpp | 69 move_imm_to_reg(OpndSize_32, 0, 17, false);
85 move_imm_to_reg(OpndSize_32, 0xaabb, PhysicalReg_EBX, true);
97 move_imm_to_reg(OpndSize_32, (int)funcPtr, C_SCRATCH_1, isScratchPhysical);
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| LowerJump.cpp | 951 move_imm_to_reg(OpndSize_32, 0, PhysicalReg_EAX, true);
952 move_imm_to_reg(OpndSize_32, LstrNullPointerException, PhysicalReg_ECX, true);
962 move_imm_to_reg(OpndSize_32, 0, PhysicalReg_EAX, true);
963 move_imm_to_reg(OpndSize_32, LstrStringIndexOutOfBoundsException, PhysicalReg_ECX, true);
974 move_imm_to_reg(OpndSize_32, 0, PhysicalReg_EAX, true);
975 move_imm_to_reg(OpndSize_32, LstrArrayIndexException, PhysicalReg_ECX, true);
985 move_imm_to_reg(OpndSize_32, 0, PhysicalReg_EAX, true);
986 move_imm_to_reg(OpndSize_32, LstrArrayStoreException, PhysicalReg_ECX, true);
996 move_imm_to_reg(OpndSize_32, 0, PhysicalReg_EAX, true);
997 move_imm_to_reg(OpndSize_32, LstrNegativeArraySizeException, PhysicalReg_ECX, true)
[all...] |
| LowerObject.cpp | 75 move_imm_to_reg(OpndSize_32, tmp, PhysicalReg_EAX, true);
82 move_imm_to_reg(OpndSize_32, (int)classPtr, PhysicalReg_EAX, true);
140 move_imm_to_reg(OpndSize_32, 0, 3, false);
154 move_imm_to_reg(OpndSize_32, 1, 3, false);
455 move_imm_to_reg(OpndSize_32, tmp, PhysicalReg_EAX, true);
556 move_imm_to_reg(OpndSize_32, LstrFilledNewArrayNotImpl, PhysicalReg_EAX, true);
557 move_imm_to_reg(OpndSize_32, (int) gDvm.exInternalError, PhysicalReg_ECX, true);
583 move_imm_to_reg(OpndSize_32, length-1, 9, false); //counter
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| LowerAlu.cpp | 791 move_imm_to_reg(OpndSize_32, imm, 2, false);
1061 move_imm_to_reg(OpndSize_32, imm, 2, false);
[all...] |
| LowerInvoke.cpp | 152 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true);
202 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true);
239 move_imm_to_reg(OpndSize_32, (int) calleeMethod, PhysicalReg_ECX, true);
571 move_imm_to_reg(OpndSize_32, (int)rPC, PhysicalReg_EDX, true);
678 move_imm_to_reg(OpndSize_32, count, 13, false);
840 move_imm_to_reg(OpndSize_32, kInlineCacheMiss, PhysicalReg_EDX, true);
[all...] |
| CodegenInterface.cpp | 647 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true);
650 //move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); /* used when unchaining */
669 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true);
672 //move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); /* used when unchaining */
688 move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true);
691 //move_imm_to_reg(OpndSize_32, (int) (cUnit->method->insns + offset), P_GPR_1, true); /* used when unchaining */
707 move_imm_to_reg(OpndSize_32, (int) (callee->insns), P_GPR_1, true);
710 //move_imm_to_reg(OpndSize_32, (int) (callee->insns), P_GPR_1, true); /* used when unchaining */
727 move_imm_to_reg(OpndSize_32, kInlineCacheMiss, PhysicalReg_EDX, true);
877 move_imm_to_reg(OpndSize_32, (int) callsiteInfo->clazz, PhysicalReg_ECX, true)
[all...] |
| LowerGetPut.cpp | 458 move_imm_to_reg(OpndSize_32, fieldOffset, 8, false);
682 move_imm_to_reg(OpndSize_32, (int)fieldPtr, PhysicalReg_EAX, true);
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| Lower.h | 762 void move_imm_to_reg(OpndSize size, int imm, int reg, bool isPhysical);
[all...] |
| LowerHelper.cpp | 1645 void move_imm_to_reg(OpndSize size, int imm, int reg, bool isPhysical) { function
[all...] |
| AnalysisO1.cpp | 609 move_imm_to_reg(OpndSize_32, (int)funcPtr, PhysicalReg_ECX, true);
[all...] |
