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  /external/llvm/test/MC/AArch64/
elf-reloc-movw.s 17 movn x17, #:abs_g0_s:some_label
20 movn x19, #:abs_g1_s:some_label
23 movn x19, #:abs_g2_s:some_label
tls-relocs.s 10 movn x2, #:dtprel_g2:var
12 movn x4, #:dtprel_g2:var
15 // CHECK-NEXT: movn x2, #:dtprel_g2:var // encoding: [0x02'A',A,0xc0'A',0x92'A']
19 // CHECK-NEXT: movn x4, #:dtprel_g2:var // encoding: [0x04'A',A,0xc0'A',0x92'A']
45 movn x6, #:dtprel_g1:var
47 movn w8, #:dtprel_g1:var
50 // CHECK-NEXT: movn x6, #:dtprel_g1:var // encoding: [0x06'A',A,0xa0'A',0x92'A']
54 // CHECK-NEXT: movn w8, #:dtprel_g1:var // encoding: [0x08'A',A,0xa0'A',0x12'A']
99 movn x12, #:dtprel_g0:var
101 movn w14, #:dtprel_g0:va
    [all...]
basic-a64-diagnostics.s     [all...]
  /dalvik/vm/compiler/template/mips/
TEMPLATE_SHL_LONG.S 15 movn rRESULT1, rRESULT0, a2 # rhi<- rlo (if shift&0x20)
16 movn rRESULT0, zero, a2 # rlo<- 0 (if shift&0x20)
TEMPLATE_USHR_LONG.S 15 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20)
16 movn rRESULT1, zero, a2 # rhi<- 0 (if shift&0x20)
TEMPLATE_SHR_LONG.S 16 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20)
17 movn rRESULT1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
TEMPLATE_STRING_INDEXOF.S 43 movn a2, zero, t7
45 movn a2, t1, t7
TEMPLATE_STRING_COMPARETO.S 41 movn a2, t2, t7 # a2<- minCount
145 movn v0, rOBJ, t0 # overwrite return value if strings are equal
  /dalvik/vm/arch/mips/
CallO32.S 251 movn $v0,$t0,$t2 /* If the result type is float or double overwrite $v1/$v0 */
252 movn $v1,$t1,$t2
255 movn $v1,$t0,$t2 /* If the result type is float or double overwrite $v0/$v1 */
256 movn $v0,$t1,$t2
258 movn $v0,$t0,$t3 /* If the result type is float overwrite $v0 */
  /dalvik/vm/mterp/mips/
OP_SHL_LONG_2ADDR.S 22 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
23 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
OP_USHR_LONG_2ADDR.S 21 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
22 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
OP_SHL_LONG.S 27 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
28 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
OP_SHR_LONG.S 27 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
28 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
OP_SHR_LONG_2ADDR.S 22 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
23 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
OP_USHR_LONG.S 26 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
27 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
  /external/valgrind/main/none/tests/mips32/
MoveIns.stdout.exp 192 MOVN.S
193 movn.s $f0, $f2, $t3 :: fs rt 0x0
194 movn.s $f0, $f2, $t3 :: fs rt 0x43e41fde
195 movn.s $f0, $f2, $t3 :: fs rt 0x40400000
196 movn.s $f0, $f2, $t3 :: fs rt 0xbf800000
197 movn.s $f0, $f2, $t3 :: fs rt 0x44ad1333
198 movn.s $f0, $f2, $t3 :: fs rt 0x0
199 movn.s $f0, $f2, $t3 :: fs rt 0x0
200 movn.s $f0, $f2, $t3 :: fs rt 0xc5b4d3c3
201 movn.s $f0, $f2, $t3 :: fs rt 0x44db000
    [all...]
MIPS32int.stdout.exp 352 MOVN
353 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x31415927, rt 0x00000000
354 movn $t0, $t1, $t2 :: rd 0x31415927 rs 0x31415927, rt 0x00000001
355 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x000000ff
356 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0xffffffff, rt 0x00000000
357 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000001
358 movn $t0, $t1, $t2 :: rd 0x00000000 rs 0x00000000, rt 0x00000000
359 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0xffffffff
360 movn $t0, $t1, $t2 :: rd 0x80000000 rs 0x80000000, rt 0x00000001
361 movn $t0, $t1, $t2 :: rd 0x7fffffff rs 0x7fffffff, rt 0x0000000
    [all...]
  /frameworks/native/opengl/libagl/arch-mips/
fixed_asm.S 50 movn $v0,$t2,$t0 /* if negative? */
  /system/core/libpixelflinger/arch-mips/
t32cb16blend.S 79 DBG movn $v0,$t8,$at
81 DBG movn $v1,$t8,$at
166 DBG movn $v0,$t8,$at
168 DBG movn $v1,$t8,$at
  /external/v8/test/cctest/
test-disasm-mips.cc 391 COMPARE(movn(a0, a1, a2),
392 "00a6200b movn a0, a1, a2");
393 COMPARE(movn(s0, s1, s2),
394 "0232800b movn s0, s1, s2");
395 COMPARE(movn(t2, t3, t4),
396 "016c500b movn t2, t3, t4");
397 COMPARE(movn(v0, v1, a2),
398 "0066100b movn v0, v1, a2");
  /bionic/libc/kernel/arch-mips/asm/
asm.h 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9:
70 #define MOVN(rd, rs, rt) movn rd, rs, rt
  /development/ndk/platforms/android-9/arch-mips/include/asm/
asm.h 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9:
70 #define MOVN(rd, rs, rt) movn rd, rs, rt
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/
asm.h 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9:
70 #define MOVN(rd, rs, rt) movn rd, rs, rt
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/
asm.h 60 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9:
65 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9:
70 #define MOVN(rd, rs, rt) movn rd, rs, rt
  /external/kernel-headers/original/asm-mips/
asm.h 166 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
169 #define MOVN(rd, rs, rt) \
185 #define MOVN(rd, rs, rt) \
202 #define MOVN(rd, rs, rt) \
203 movn rd, rs, rt

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