| /development/ndk/sources/android/libportable/arch-mips/ |
| _setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
108 swc1 $f20, JB_F20(a0)
109 swc1 $f21, JB_F21(a0)
110 swc1 $f22, JB_F22(a0)
111 swc1 $f23, JB_F23(a0)
112 swc1 $f24, JB_F24(a0)
113 swc1 $f25, JB_F25(a0)
114 swc1 $f26, JB_F26(a0)
115 swc1 $f27, JB_F27(a0)
116 swc1 $f28, JB_F28(a0
[all...] |
| setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
122 swc1 $f20, JB_F20(a0)
123 swc1 $f21, JB_F21(a0)
124 swc1 $f22, JB_F22(a0)
125 swc1 $f23, JB_F23(a0)
126 swc1 $f24, JB_F24(a0)
127 swc1 $f25, JB_F25(a0)
128 swc1 $f26, JB_F26(a0)
129 swc1 $f27, JB_F27(a0)
130 swc1 $f28, JB_F28(a0
[all...] |
| /bionic/libc/arch-mips/bionic/ |
| _setjmp.S | 48 swc1 FPR, OFF(BASE) ; \
102 swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
103 swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
104 swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
105 swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
106 swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
107 swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
108 swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
109 swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
110 swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0
[all...] |
| setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
115 swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
116 swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
117 swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
118 swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
119 swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
120 swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
121 swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
122 swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
123 swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips-memory-instructions.s | 13 # CHECK: swc1 $f2, 16($5) # encoding: [0x10,0x00,0xa2,0xe4]
20 swc1 $f2, 16($5)
|
| mips-fpu-instructions.s | 151 # CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
170 swc1 $f9,9158($a3)
|
| /external/valgrind/main/none/tests/mips32/ |
| vfp.stdout.exp | 153 SWC1
154 swc1 $f0, 0($t0) :: out: 0x0
155 swc1 $f0, 0($t0) :: out: 0x40400000
156 swc1 $f0, 0($t0) :: out: 0x44ad1333
157 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
158 swc1 $f0, 0($t0) :: out: 0x44db0000
159 swc1 $f0, 0($t0) :: out: 0x322bcc77
160 swc1 $f0, 0($t0) :: out: 0xc732da7a
161 swc1 $f0, 0($t0) :: out: 0x42080079
162 swc1 $f0, 0($t0) :: out: 0x49d5e00
[all...] |
| /external/v8/src/mips/ |
| lithium-gap-resolver-mips.cc | 240 __ swc1(kLithiumScratchDouble, destination_operand);
|
| disasm-mips.cc | 913 case SWC1:
914 Format(instr, "swc1 'ft, 'imm16s('rs)");
|
| assembler-mips.h | 797 void swc1(FPURegister fs, const MemOperand& dst);
[all...] |
| assembler-mips.cc | 1637 void Assembler::swc1(FPURegister fd, const MemOperand& src) { function in class:v8::Assembler
[all...] |
| stub-cache-mips.cc | [all...] |
| lithium-codegen-mips.cc | [all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 1095 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
1102 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out)));
1180 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \
1184 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \
1188 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \
1192 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | [all...] |
| MIPSAssembler.h | 552 void swc1(FPRegisterID ft, RegisterID rs, int offset) function in class:JSC::MIPSAssembler
|
