| /external/valgrind/main/none/tests/mips32/ |
| LoadStore.stdout.exp | 172 swl
173 swl $t0, 0($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e00
175 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x31
176 swl $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e31
177 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7f
178 swl $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e7f
179 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x80
180 swl $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e80
181 swl $t0, 2($t1) :: RTval: 0x80000000, out: 0x8
[all...] |
| LoadStore1.stdout.exp | 172 swl
173 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
174 swl $t0, 1($t1) :: RTval: 0x0, out: 0x0
175 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
176 swl $t0, 3($t1) :: RTval: 0x31415927, out: 0x31000000
177 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
178 swl $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x7fffff00
179 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
180 swl $t0, 7($t1) :: RTval: 0x80000000, out: 0x80000000
181 swl $t0, 9($t1) :: RTval: 0x80000000, out: 0x8000000
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips-memory-instructions.s | 14 # CHECK: swl $4, 16($5) # encoding: [0x10,0x00,0xa4,0xa8]
21 swl $4, 16($5)
|
| /bionic/libc/arch-mips/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /bionic/libc/arch-mips/string/ |
| memset.S | 50 # define SWHI swl /* high part is left in big-endian */
56 # define SWLO swl /* low part is left in little-endian */
|
| memcpy.S | 51 # define SWHI swl /* high part is left in big-endian */
60 # define SWLO swl /* low part is left in big-endian */
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 70 #define SWLO swl
81 #define SWHI swl
|
| /system/core/libcutils/tests/memset_mips/ |
| memset_cmips.S | 50 # define SWHI swl /* high part is left in big-endian */
|
| memset_omips.S | 30 # define SWHI swl /* high part is left in big-endian */
|
| /external/openssl/crypto/aes/asm/ |
| aes-mips.S | 292 swl $8,0+3($5)
293 swl $9,4+3($5)
294 swl $10,8+3($5)
295 swl $11,12+3($5)
599 swl $8,0+3($5)
600 swl $9,4+3($5)
601 swl $10,8+3($5)
602 swl $11,12+3($5)
|
| aes-mips.pl | 410 swl $s0,0+$MSB($out)
411 swl $s1,4+$MSB($out)
412 swl $s2,8+$MSB($out)
413 swl $s3,12+$MSB($out)
747 swl $s0,0+$MSB($out)
748 swl $s1,4+$MSB($out)
749 swl $s2,8+$MSB($out)
750 swl $s3,12+$MSB($out)
[all...] |
| /external/qemu/target-mips/ |
| helper.h | 15 DEF_HELPER_3(swl, void, tl, tl, int)
|
| translate.c | [all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 837 // Test LWL, LWR, SWL and SWR instructions.
899 // Test all combinations of SWL and vAddr.
903 __ swl(t0, MemOperand(a0, OFFSET_OF(T, swl_0)) );
908 __ swl(t1, MemOperand(a0, OFFSET_OF(T, swl_1) + 1) );
913 __ swl(t2, MemOperand(a0, OFFSET_OF(T, swl_2) + 2) );
918 __ swl(t3, MemOperand(a0, OFFSET_OF(T, swl_3) + 3) );
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 754 void swl(Register rd, const MemOperand& rs);
[all...] |
| assembler-mips.cc | 1439 void Assembler::swl(Register rd, const MemOperand& rs) { function in class:v8::Assembler
[all...] |
