| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 184 { ISD::FP_EXTEND, MVT::v2f32, 2 },
226 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
227 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
228 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
229 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
230 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
231 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
432 { ISD::VECTOR_SHUFFLE, MVT::v2f32, 1 },
|
| ARMISelLowering.cpp | 457 addDRTypeForNEON(MVT::v2f32);
525 // Mark v2f32 intrinsics.
526 setOperationAction(ISD::FSQRT, MVT::v2f32, Expand);
527 setOperationAction(ISD::FSIN, MVT::v2f32, Expand);
528 setOperationAction(ISD::FCOS, MVT::v2f32, Expand);
529 setOperationAction(ISD::FPOWI, MVT::v2f32, Expand);
530 setOperationAction(ISD::FPOW, MVT::v2f32, Expand);
531 setOperationAction(ISD::FLOG, MVT::v2f32, Expand);
532 setOperationAction(ISD::FLOG2, MVT::v2f32, Expand);
533 setOperationAction(ISD::FLOG10, MVT::v2f32, Expand)
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 97 v2f32 = 42, // 2 x f32 enumerator in enum:llvm::MVT::SimpleValueType
206 SimpleTy == MVT::v2f32);
291 case v2f32:
336 case v2f32:
382 case v2f32: return 64;
524 if (NumElements == 2) return MVT::v2f32;
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 159 case MVT::v2f32: return "v2f32";
223 case MVT::v2f32: return VectorType::get(Type::getFloatTy(Context), 2);
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 56 (int)MVT::v2f32,
81 (int)MVT::v2f32,
409 FLTTY = MVT::v2f32;
|
| SIISelLowering.cpp | 48 addRegisterClass(MVT::v2f32, &AMDGPU::VReg_64RegClass);
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 101 case MVT::v2f32: return "MVT::v2f32";
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 62 case MVT::v2f32:
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
