| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.h | 37 // For the 2nd half of a v2f64, do not fail.
64 if (LocVT == MVT::v2f64 &&
80 // For the 2nd half of a v2f64, do not just fail.
112 if (LocVT == MVT::v2f64 &&
144 if (LocVT == MVT::v2f64 && !f64RetAssign(ValNo, ValVT, LocVT, LocInfo, State))
|
| ARMTargetTransformInfo.cpp | 183 { ISD::FP_ROUND, MVT::v2f64, 2 },
255 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
256 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
258 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
259 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 },
260 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
261 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
262 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
263 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i32, 2 },
265 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }
[all...] |
| ARMISelLowering.cpp | 159 addTypeForNEON(VT, MVT::v2f64, MVT::v4i32);
464 addQRTypeForNEON(MVT::v2f64);
470 // v2f64 is legal so that QR subregs can be extracted as f64 elements, but
474 setOperationAction(ISD::FADD, MVT::v2f64, Expand);
475 setOperationAction(ISD::FSUB, MVT::v2f64, Expand);
476 setOperationAction(ISD::FMUL, MVT::v2f64, Expand);
479 setOperationAction(ISD::FDIV, MVT::v2f64, Expand);
480 setOperationAction(ISD::FREM, MVT::v2f64, Expand);
484 setOperationAction(ISD::FCOPYSIGN, MVT::v2f64, Expand);
487 setOperationAction(ISD::SETCC, MVT::v2f64, Expand)
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 58 (int)MVT::v2f64,
83 (int)MVT::v2f64,
176 // we support loading/storing v2f64 but not operations on the type
177 setOperationAction(ISD::FADD, MVT::v2f64, Expand);
178 setOperationAction(ISD::FSUB, MVT::v2f64, Expand);
179 setOperationAction(ISD::FMUL, MVT::v2f64, Expand);
180 setOperationAction(ISD::FP_ROUND_INREG, MVT::v2f64, Expand);
181 setOperationAction(ISD::FP_EXTEND, MVT::v2f64, Expand);
185 setOperationAction(ISD::TRUNCATE, MVT::v2f64, Expand);
186 setOperationAction(ISD::SIGN_EXTEND, MVT::v2f64, Expand)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 101 v2f64 = 46, // 2 x f64 enumerator in enum:llvm::MVT::SimpleValueType
213 SimpleTy == MVT::v4f32 || SimpleTy == MVT::v2f64);
295 case v2f64:
337 case v2f64: return 2;
392 case v2f64: return 128;
530 if (NumElements == 2) return MVT::v2f64;
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 296 DecodeSHUFPMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
338 DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
374 DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
424 DecodePSHUFMask(MVT::v2f64, MI->getOperand(MI->getNumOperands()-1).getImm(),
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 164 case MVT::v2f64: return "v2f64";
227 case MVT::v2f64: return VectorType::get(Type::getDoubleTy(Context), 2);
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86TargetTransformInfo.cpp | 287 { ISD::SETCC, MVT::v2f64, 1 },
|
| X86FastISel.cpp | 268 case MVT::v2f64:
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 105 case MVT::v2f64: return "MVT::v2f64";
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 64 case MVT::v2f64:
[all...] |
