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  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/
omxVCM4P2_DecodeVLCZigzag_IntraDCVLC_s.s 137 LDR pDCLumaChromaIndex, =armVCM4P2_aIntraDCLumaChromaIndex ;// Load Optimized VLC Table for Luminance and Chrominance
191 LDR pZigzagTable, =armVCM4P2_aClassicalZigzagScan ;// Load Zigzag talbe address
195 LDR pVlcTableL0L1, =armVCM4P2_IntraVlcL0L1 ;// Load Optimized VLC Table With both Last=0 and Last=1 Entries
197 LDR pLMAXTableL0L1, =armVCM4P2_IntraL0L1LMAX ;// Load LMAX Table
199 LDR pRMAXTableL0L1, =armVCM4P2_IntraL0L1RMAX ;// Load RMAX Table
  /external/llvm/test/CodeGen/AArch64/
sibling-call.ll 76 ; CHECK: ldr x0,
77 ; CHECK: ldr x1,
95 ; CHECK: ldr [[FPTR:x[1-9]+]], [{{x[0-9]+}}, #:lo12:func]
  /external/llvm/test/CodeGen/Thumb2/
2010-06-14-NEONCoalescer.ll 26 ; CHECK: vldr [[LDR:d.*]],
28 ; CHECK: vadd.f64 [[ADD:d.*]], [[LDR]], [[LDR]]
  /external/sonivox/arm-hybrid-22k/lib_src/
ARM-E_mastergain_gnu.s 70 LDR r6, =0x7fff @constant for saturation tests
73 LDR r4, [pnInputBuffer], #4 @fetch 1st output sample
75 LDR r5, [pnInputBuffer], #4 @fetch 2nd output sample
  /external/sonivox/arm-wt-22k/lib_src/
ARM-E_mastergain_gnu.s 70 LDR r6, =0x7fff @constant for saturation tests
73 LDR r4, [pnInputBuffer], #4 @fetch 1st output sample
75 LDR r5, [pnInputBuffer], #4 @fetch 2nd output sample
  /dalvik/vm/mterp/out/
InterpAsm-armv5te.S 83 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
85 #define LOAD_FP_FROM_SELF() ldr rFP, [rSELF, #offThread_curFrame]
186 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
287 ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
292 ldr r0, [rSELF, #offThread_pJitProfTable]
300 ldr r2, [rSELF, #offThread_shadowSpace] @ to find out the jit exit state
302 ldr r3, [r2, #offShadowSpace_jitExitState] @ jit exit state
321 ldr r0, strBadEntryPoint
348 ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
526 ldr r0, [rSELF, #offThread_retval] @ r0<- self->retval.
    [all...]
  /bionic/libc/arch-arm/bionic/
sigsetjmp.S 61 ldr r2, .L_setjmp_magic
62 ldr r3, [r0]
  /dalvik/vm/compiler/template/armv5te/
TEMPLATE_CMPL_FLOAT.S 39 ldr ip, .L__aeabi_cfcmple @ cmp <=: C clear if <, Z set if eq
51 ldr ip, .L__aeabi_cfcmple @ r0<- Z set if eq, C clear if <
  /external/libvpx/libvpx/vp8/common/arm/armv6/
copymem8x4_v6.asm 80 ldr r4, [r0]
81 ldr r5, [r0, #4]
copymem8x8_v6.asm 80 ldr r4, [r0]
81 ldr r5, [r0, #4]
  /external/llvm/test/CodeGen/ARM/
2011-11-28-DAGCombineBug.ll 14 ; CHECK: ldr.w
15 ; CHECK: ldr.w
fast-isel-ldr-str-arm.ll 8 ; ARM: ldr r{{[0-9]}}, [r0, #4]
17 ; ARM: ldr.w r{{[0-9]}}, [r0, #252]
unaligned_load_store.ll 21 ; UNALIGNED: ldr r1
71 ; UNALIGNED: ldr
  /external/llvm/test/MC/ARM/
arm_addrmode2.s 30 @ CHECK: ldr r1, [r0, r2, lsr #3]! @ encoding: [0xa2,0x11,0xb0,0xe7]
32 ldr r1, [r0, r2, lsr #3]!
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/
armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.s 109 LDR r0x00ff00ff, =0x00ff00ff ;// [0 255 0 255] 255 is offset to avoid negative results
113 LDR ValD, [pSrc, srcStep] ;// Load row 1 [d1 c1 b1 a1]
114 LDR ValA, [pSrc], #4 ;// Load row 0 [d0 c0 b0 a0]
115 LDR ValH, [pSrc, srcStep] ;// Load [h1 g1 f1 e1]
116 LDR ValE, [pSrc], #4 ;// Load [h0 g0 f0 e0]
222 LDR r0x0014fffb, =0x0014fffb
223 LDR r0x00140001, =0x00140001
260 LDR r0x0001fc00, =0x0001fc00 ;// (0xff * 16 * 32) - 512
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.S 23 LDR r4,[sp,#0x6c]
24 LDR r5,[sp,#0x68]
omxVCM4P10_TransformDequantLumaDCFromPair_s.S 19 LDR r2, .LarmVCM4P10_QPDivTable
21 LDR r3, .LarmVCM4P10_VMatrixQPModTable
  /sdk/emulator/qtools/
opcode.cpp 126 "ldr",
179 "ldr",
  /external/llvm/lib/Target/ARM/
README.txt 96 ldr r0, LCPI17_3
97 ldr r1, LCPI17_4
98 ldr r2, LCPI17_5
101 ldr r0, LCPI17
102 ldr r1, LCPI17+4
103 ldr r2, LCPI17+8
105 Then the ldr's can be combined into a single ldm. See Olden/power.
126 ldr r2, [r1]
198 ldr r0, L5
199 ldr r3, [sp, #8
    [all...]
  /bionic/libc/arch-arm/krait/bionic/
strcmp.S 96 use LDR and a shift queue. Order of loads and comparisons matters,
205 ldr r2, [r0], #4
250 ldr r2, [r0], #4
251 ldr r4, [r1], #4
264 ldr r5, [r1], #4
288 ldr r5, [r1], #4
293 ldr r3, [r0], #4
301 ldr r5, [r1], #4
400 ldr w1, [wp1], #4
401 ldr w2, [wp2], #
    [all...]
  /external/tremolo/Tremolo/
mdctLARM.s 95 LDR r5,[r2,#-4]!
121 LDR r12,[r2],#8
122 LDR r7, [r2],#8
123 LDR r6, [r2],#8
124 LDR r5, [r2],#8
163 LDR r5,[r2], #8
195 LDR r12,[r2, #-8]! @ r12= *l (but l -= 2 first)
196 LDR r7, [r3, #-4]! @ r7 = *--r
235 LDR r12,[r2],#8 @ r12= *l (but l += 2 first)
236 LDR r7, [r3],#4 @ r7 = *r+
    [all...]
  /external/v8/src/arm/
stub-cache-arm.cc 81 __ ldr(ip, MemOperand(base_addr, 0));
86 __ ldr(ip, MemOperand(base_addr, map_off_addr - key_off_addr));
87 __ ldr(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset));
94 __ ldr(code, MemOperand(base_addr, value_off_addr - key_off_addr));
99 __ ldr(flags_reg, FieldMemOperand(code, Code::kFlagsOffset));
152 __ ldr(map, FieldMemOperand(receiver, HeapObject::kMapOffset));
164 __ ldr(properties, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
166 __ ldr(map, FieldMemOperand(properties, HeapObject::kMapOffset));
173 __ ldr(properties, FieldMemOperand(receiver, JSObject::kPropertiesOffset));
231 __ ldr(scratch, FieldMemOperand(name, String::kHashFieldOffset))
    [all...]
lithium-codegen-arm.cc 199 __ ldr(r0, MemOperand(fp, parameter_offset));
283 __ ldr(pc, MemOperand(pc, Assembler::kInstrSize - Assembler::kPcLoadDelta));
342 __ ldr(scratch, ToMemOperand(op));
883 __ ldr(r0, MemOperand(sp, 0));
    [all...]
  /dalvik/vm/mterp/armv5te/
OP_AGET_WIDE.S 16 ldr r3, [r0, #offArrayObject_length] @ r3<- arrayObj->length
OP_APUT.S 19 ldr r3, [r0, #offArrayObject_length] @ r3<- arrayObj->length

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