| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 235 @ LDR (immediate)
237 ldr r1, [r5]
238 ldr r2, [r6, #32]
239 ldr r3, [r7, #124]
240 ldr r1, [sp]
241 ldr r2, [sp, #24]
242 ldr r3, [sp, #1020]
245 @ CHECK: ldr r1, [r5] @ encoding: [0x29,0x68]
246 @ CHECK: ldr r2, [r6, #32] @ encoding: [0x32,0x6a]
247 @ CHECK: ldr r3, [r7, #124] @ encoding: [0xfb,0x6f
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 223 * D/dalvikvm( 1538): 0x59414c5e (0026): ldr r14, [r15pc, #220] <-hoisted
229 * D/dalvikvm( 1538): 0x59414c70 (0038): ldr r10, [r9, #0] |
[all...] |
| ArmLIR.h | 370 kThumbLdrRRI5, /* ldr(1) [01101] imm_5[10..6] rn[5..3] rd[2..0] */
371 kThumbLdrRRR, /* ldr(2) [0101100] rm[8..6] rn[5..3] rd[2..0] */
372 kThumbLdrPcRel, /* ldr(3) [01001] rd[10..8] imm_8[7..0] */
373 kThumbLdrSpRel, /* ldr(4) [10011] rd[10..8] imm_8[7..0] */
461 kThumb2LdrRRI8Predec, /* ldr(Imm,T4) rd,[rn,#-imm8] [111110000101]
495 kThumb2LdrRRR, /* ldr rt,[rn,rm,LSL #imm] [111110000101] rn[19-16]
586 kThumb2LdrPcRel12, /* ldr rd,[pc,#imm12] [1111100011011111] rt[15-12]
628 kThumb2LdrPcReln12, /* ldr rd,[pc,-#imm12] [1111100011011111] rt[15-12]
[all...] |
| /dalvik/vm/compiler/ |
| Compiler.cpp | 561 * D/dalvikvm( 2468): 0x20 (0020): ldr r0, [r5, #52]
562 * D/dalvikvm( 2468): 0x22 (0022): ldr r2, [pc, #96]
565 * D/dalvikvm( 2468): 0x28 (0028): ldr r1, [r1, #0]
566 * D/dalvikvm( 2468): 0x2a (002a): ldr r0, [r0, #0]
570 * D/dalvikvm( 2468): 0x32 (0032): ldr r0, [r5, #52]
577 * D/dalvikvm( 2468): 0x38 (0038): ldr r7, [r5, #104]
584 * D/dalvikvm( 2468): 0x3e (003e): ldr r0, [r5, #104]
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| ivchain-ARM.ll | 86 ; A9-NOT: {{ldr .*[sp]|lsl}}
211 ; A9-NOT: {{ldr|str|adds|add r}}
213 ; A9-NOT: {{ldr|str|adds|add r}}
215 ; A9-NOT: {{ldr|str|adds|add r}}
217 ; A9-NOT: {{ldr|str|adds|add r}}
|
| /external/skia/src/opts/ |
| SkBlitRow_opts_arm.cpp | 28 "ldr r3, [%[src]], #4 \n\t"
160 "ldr r5, [%[src]], #4 \n\t" /* load the src pointer into r5 r5=src */
161 "ldr r7, [%[dst]] \n\t" /* loading dst into r7 */
288 "ldr r5, [%[src]], #4 \n\t" /* loading src pointer into r5: r5=src */
289 "ldr r7, [%[dst]] \n\t" /* loading dst pointer into r7: r7=dst */
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 379 LDR mask, =0x80808080
410 LDR mask, =0x80808080
455 LDR yMask, =((0x01010101 << 4) + 8)
673 LDR dst, [pDst] ;// dst = [dcba]
686 LDR dst, [pDst]
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon.S | 37 ldr r4, [sp, #32+64]
41 ldr r4, [sp, #36+64]
291 ldr r4, [sp, #32+64]
292 ldr r5, [sp, #32+64 + 4]
293 ldr r6, [sp, #32+64 + 8]
344 ldr r4, [sp, #32+64]
345 ldr r5, [sp, #32+64 + 4]
384 ldr r4, [sp, #32+64]
385 ldr r5, [sp, #32+64 + 4]
433 ldr r4, [sp, #64+12] @ load the coeffs address in memory in r4 (16*4 + 4*3
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| vp8_subpixelvariance16x16_neon.asm | 36 ldr r4, [sp, #16] ;load *dst_ptr from stack
37 ldr r5, [sp, #20] ;load dst_pixels_per_line from stack
38 ldr r6, [sp, #24] ;load *sse from stack
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| omxVCM4P10_PredictIntra_16x16_s.s | 180 LDR pTable,=armVCM4P10_pIndexTable16x16 ;// Load index table for switch case
189 LDR pc, [pTable, predMode, LSL #2] ;// Branch to the case based on preMode
320 LDR pMultTable, =armVCM4P10_MultiplierTable16x16
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Gen.cpp | 39 * ldr r0, [r0] @ get address of counter
40 * ldr r1, [r0]
|
| /external/v8/src/arm/ |
| assembler-arm-inl.h | 208 // ldr ip, [pc, #0]
215 // ldr pc, [pc, #-4]
|
| assembler-arm.h | 709 // ldr ip, [pc, #...] @ call address
716 // ldr pc, [pc, #...] @ call address
725 // ldr ip, [pc, #0] @ emited address and start
731 // ldr pc, [pc, #-4] @ emited address
739 // ldr ip, [pc, #0] @ emited address and start
745 // ldr pc, [pc, #-4] @ emited address
921 void ldr(Register dst, const MemOperand& src, Condition cond = al);
[all...] |
| /external/valgrind/main/helgrind/tests/ |
| annotate_hbefore.c | 158 "ldr r4, [%1, #0]" "\n\t"
159 "ldr r5, [%1, #4]" "\n\t"
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Filt_6k_7k_neon.s | 53 LDR r10, [r3]
210 @LDR r1, [sp, #-4] @mem address
|
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 54 STATISTIC(NumLDRD2LDR, "Number of ldrd instructions turned back into ldr's");
844 /// register into the LDR/STR/FLD{D|S}/FST{D|S} op when possible:
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| strlen.c | 63 "ldr %[v], [ %[s] ], #4 \n"
|
| /bionic/libc/arch-arm/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /dalvik/vm/native/ |
| InternalNative.cpp | 220 LOGVV("GOOD: load %s (%d) --> %p ldr=%p",
|
| java_lang_VMClassLoader.cpp | 104 LOGVV("look: %s ldr=%p --> %p", descriptor, loader, clazz);
|
| /development/ndk/platforms/android-3/arch-arm/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /external/kernel-headers/original/asm-arm/arch/ |
| io.h | 107 /* 8/32 bit uses LDR/STR, base +/- offset_12 */
|
| /external/llvm/docs/ |
| MarkedUpDisassembly.rst | 75 ldr <reg gpr:r0>, <mem regoffset:[<reg gpr:sp>, <imm:#4>]>
|
| /external/llvm/test/CodeGen/AArch64/ |
| alloca.ll | 58 ; CHECK: ldr x0, [x[[TMP]]]
|
| /external/llvm/test/CodeGen/ARM/ |
| select.ll | 84 ; CHECK-NEON-NEXT: ldr
|
