| /prebuilts/ndk/8/platforms/android-14/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /prebuilts/ndk/8/platforms/android-3/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /prebuilts/ndk/8/platforms/android-4/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /prebuilts/ndk/8/platforms/android-5/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /prebuilts/ndk/8/platforms/android-8/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /prebuilts/ndk/8/platforms/android-9/arch-arm/usr/include/machine/ |
| cpu-features.h | 143 * ldr pc, [<some address>]
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssembler.cpp | 299 void ARMAssembler::LDR(int cc, int Rd, int Rn, uint32_t offset) {
526 // LDR(B)/STR(B)/PLD (immediate and Rm can be negative, which indicate U=0)
530 "LDR(B)/STR(B)/PLD immediate too big (%08x)",
539 "LDR(B)/STR(B)/PLD immediate too big (%08x)",
|
| ARMAssemblerInterface.h | 86 // LDR(B)/STR(B)/PLD
153 virtual void LDR (int cc, int Rd,
|
| GGLAssembler.h | 35 LDR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
150 mGen.LDR(mGen.AL, reg, mGen.SP, mGen.immed12_post(4));
|
| load_store.cpp | 74 if (inc) LDR(AL, s.reg, addr.reg, immed12_post(4));
75 else LDR(AL, s.reg, addr.reg);
|
| texturing.cpp | [all...] |
| /system/core/libpixelflinger/ |
| col32cb16blend_neon.S | 118 ldr r4, [r1] // load source color
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb1.txt | 155 # LDR (immediate)
157 # CHECK: ldr r1, [r5]
158 # CHECK: ldr r2, [r6, #32]
159 # CHECK: ldr r3, [r7, #124]
160 # CHECK: ldr r1, [sp]
161 # CHECK: ldr r2, [sp, #24]
162 # CHECK: ldr r3, [sp, #1020]
163 # CHECK: ldr r1, [pc, #12]
175 # LDR (register)
177 # CHECK: ldr r1, [r2, r3
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| Assemble.cpp | 222 "ldr", "r!0d, [r!1d, #!2E]", 1),
226 "ldr", "r!0d, [r!1d, r!2d]", 1),
230 | IS_LOAD, "ldr", "r!0d, [pc, #!1E]", 1),
234 | IS_LOAD, "ldr", "r!0d, [sp, #!2E]", 1),
497 "ldr", "r!0d, [r!1d, #!2d]", 2),
505 "ldr", "r!0d, [r!1d, #-!2d]", 2),
586 "ldr", "r!0d, [r!1d, r!2d, LSL #!3d]", 2),
[all...] |
| /external/v8/src/arm/ |
| assembler-arm.cc | 246 // ldr(r, MemOperand(sp, 4, PostIndex), al) instruction (aka pop(r))
252 // ldr rd, [pc, #offset]
275 // A mask for the Rd register for push, pop, ldr, str instructions.
504 // ldr<cond> <Rd>, [pc +/- offset_12].
804 // mov instruction will be an ldr from constant pool (one instruction).
813 // instructions - either mov or ldr. The mov might actually be two
841 // condition code), then replace it with a 'ldr rd, [pc]'.
848 ldr(rd, MemOperand(pc, 0), cond);
862 ldr(ip, MemOperand(pc, 0), cond);
[all...] |
| /bionic/libc/tools/ |
| gensyscalls.py | 88 ldr r7, =%(idname)s
103 ldr r7, =%(idname)s
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Gen.cpp | 36 * ldr r0, [pc-8] @ get prof count addr [4 bytes]
37 * ldr r1, [r0] @ load counter [2 bytes]
|
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| bilinearpredict16x16_neon.asm | 29 ldr r4, [sp, #12] ;load parameters from stack
30 ldr r5, [sp, #16] ;load parameters from stack
|
| sixtappredict4x4_neon.asm | 40 ldr r4, [sp, #8] ;load parameters from stack
41 ldr lr, [sp, #12] ;load parameters from stack
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb.td | 590 IIC_iLoad_r, IIC_iLoad_i, "ldr",
621 "ldr", "\t$Rt, $addr",
631 // FIXME: Use ldr.n to work around a darwin assembler bug.
634 "ldr", ".n\t$Rt, $addr",
644 // FIXME: Remove this entry when the above ldr.n workaround is fixed.
647 "ldr", "\t$Rt, $addr", []>,
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| ARMv7Assembler.h | 1008 void ldr(RegisterID rt, RegisterID rn, ARMThumbImmediate imm) function in namespace:JSC::ARMRegisters
1010 ASSERT(rn != ARMRegisters::pc); // LDR (literal)
1032 void ldr(RegisterID rt, RegisterID rn, int offset, bool index, bool wback) function in namespace:JSC::ARMRegisters
1055 void ldr(RegisterID rt, RegisterID rn, RegisterID rm, unsigned shift=0) function in namespace:JSC::ARMRegisters
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_TransformDequantLumaDCFromPair_s.s | 318 LDR pQPDivTable, =armVCM4P10_QPDivTable ;// QP Division look-up-table base pointer
325 LDR pQPModTable, =armVCM4P10_VMatrixQPModTable ;// QP Modulo look-up-table base pointer
|
| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| memcpy.S | 156 * a ldr[b|h] and str[b|h] because byte and half-word instructions
|
| /external/kernel-headers/original/asm-x86/ |
| apicdef_32.h | 186 } ldr; member in struct:local_apic
|
| /external/llvm/test/CodeGen/Mips/ |
| cmov.ll | 11 ; N64: ldr $[[R0:[0-9]+]]
|
