/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
mii.h | 2 * linux/mii.h: definitions for MII-compatible transceivers 13 /* Generic MII registers. */ 43 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */ 81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */ 82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
mii.h | 2 * linux/mii.h: definitions for MII-compatible transceivers 13 /* Generic MII registers. */ 43 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */ 81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */ 82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
mii.h | 2 * linux/mii.h: definitions for MII-compatible transceivers 13 /* Generic MII registers. */ 43 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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sockios.h | 80 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */ 81 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */ 82 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
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/external/llvm/lib/CodeGen/ |
OptimizePHIs.cpp | 157 MII = MBB.begin(), E = MBB.end(); MII != E; ) { 158 MachineInstr *MI = &*MII++; 184 if (&*MII == PhiMI) 185 ++MII;
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/external/openssl/crypto/aes/asm/ |
aes-ia64.S | 254 { .mii; ld1 te13=[te13] // 9/2:te0[s3>>16] 257 { .mii; ld1 te10=[te10] // 10/3:te0[s0>>16] 260 { .mii; xor t0=t0,te33 // 11/0: 263 { .mii; xor r16=t0,te00 // 12/0:done! 322 { .mii; mov psr.um=loc0 355 { .mii; 358 { .mii; ADDP rk0=0,in2 361 { .mii; ADDP rk1=KSZ,in2 364 { .mii; mov twenty4=24 367 { .mii; mov sixteen=1 [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineInstrBuilder.h | 272 MachineBasicBlock::instr_iterator MII = I; 273 return BuildMI(BB, MII, DL, MCID, DestReg); 276 MachineBasicBlock::iterator MII = I; 277 return BuildMI(BB, MII, DL, MCID, DestReg); 309 MachineBasicBlock::instr_iterator MII = I; 310 return BuildMI(BB, MII, DL, MCID); 313 MachineBasicBlock::iterator MII = I; 314 return BuildMI(BB, MII, DL, MCID);
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/external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
MBlazeMCTargetDesc.cpp | 98 const MCInstrInfo &MII, 102 return new MBlazeInstPrinter(MAI, MII, MRI);
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/external/llvm/lib/Target/MSP430/MCTargetDesc/ |
MSP430MCTargetDesc.cpp | 64 const MCInstrInfo &MII, 68 return new MSP430InstPrinter(MAI, MII, MRI);
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/external/llvm/lib/Target/Mips/InstPrinter/ |
MipsInstPrinter.h | 80 MipsInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 82 : MCInstPrinter(MAI, MII, MRI) {}
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
PPCInstPrinter.h | 27 PPCInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 29 : MCInstPrinter(MAI, MII, MRI), SyntaxVariant(syntaxVariant) {}
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
AMDGPUMCTargetDesc.cpp | 68 const MCInstrInfo &MII, 71 return new AMDGPUInstPrinter(MAI, MII, MRI);
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86ATTInstPrinter.h | 25 X86ATTInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 27 : MCInstPrinter(MAI, MII, MRI) {}
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X86IntelInstPrinter.h | 26 X86IntelInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 28 : MCInstPrinter(MAI, MII, MRI) {}
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/external/llvm/lib/Target/XCore/MCTargetDesc/ |
XCoreMCTargetDesc.cpp | 76 const MCInstrInfo &MII, 79 return new XCoreInstPrinter(MAI, MII, MRI);
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/external/clang/lib/Frontend/ |
FrontendOptions.cpp | 24 .Case("mii", IK_PreprocessedObjCXX)
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/external/llvm/lib/MC/ |
MCInstPrinter.cpp | 25 return MII.getName(Opcode);
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/external/clang/include/clang/Driver/ |
Types.def | 51 TYPE("objective-c++-cpp-output", PP_ObjCXX, INVALID, "mii", "u") 52 TYPE("objc++-cpp-output", PP_ObjCXX_Alias, INVALID, "mii", "u") 63 TYPE("objective-c++-header-cpp-output", PP_ObjCXXHeader, INVALID, "mii", "p")
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/external/grub/netboot/ |
epic100.h | 26 MMCTL = 0x30, /* MII Management Interface Control */ 27 MMDATA = 0x34, /* MII Management Interface Data */ 28 MIICFG = 0x38, /* MII Configuration */
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tulip.c | 80 patch to tulip.c that implements the automatic selection of the MII 87 Added simple MII support. Re-arranged code to better modularize 91 PNIC2 cards. No MII support, but single interface (RJ45) tulip 153 "100baseFx-FDX", "MII 10baseT", "MII 10baseT-FDX", "MII", 154 "10baseT(forced)", "MII 100baseTx", "MII 100baseTx-FDX", "MII 100baseT4", 155 "MII 100baseFx-HDX", "MII 100baseFx-FDX", "Home-PNA 1Mbps", "Invalid-19" [all...] |
epic100.c | 82 static signed char phys[4]; /* MII device addresses. */ 130 mmctl = ioaddr + MMCTL; /* MII Management Interface Control */ 131 mmdata = ioaddr + MMDATA; /* MII Management Interface Data */ 184 /* Find the connected MII xcvrs. */ 191 printf("MII transceiver found at address %d.\n", phy); 197 printf("***WARNING***: No MII transceiver found!\n");
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/external/kernel-headers/original/linux/ |
sockios.h | 81 #define SIOCGMIIPHY 0x8947 /* Get address of MII PHY in use. */ 82 #define SIOCGMIIREG 0x8948 /* Read MII PHY register. */ 83 #define SIOCSMIIREG 0x8949 /* Write MII PHY register. */
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/frameworks/base/media/tests/MediaFrameworkTest/src/com/android/mediaframeworktest/functional/videoeditor/ |
MediaPropertiesTest.java | 121 int width, int height, MediaImageItem mii) 123 assertEquals("Aspect Ratio Mismatch", aspectRatio, mii.getAspectRatio()); 124 assertEquals("File Type Mismatch", fileType, mii.getFileType()); 125 assertEquals("Image height " + mii.getHeight(), height, mii.getHeight()); 126 assertEquals("Image width " + mii.getWidth(), width, mii.getWidth()); 589 final MediaImageItem mii = mVideoEditorHelper.createMediaItem local 592 validateImageProperties(aspectRatio, fileType, width, height, mii); 607 final MediaImageItem mii = mVideoEditorHelper.createMediaIte local [all...] |