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  /frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/
mp4def.h 84 //typedef Int MOT; /* : "int" type runs faster on RISC machine */
  /external/openssl/crypto/sha/asm/
sha512-parisc.pl 10 # SHA256/512 block procedure for PA-RISC.
20 # PA-7100LC, PA-RISC 1.1 processor. Then implementation detects if the
21 # code is executed on PA-RISC 2.0 processor and switches to 64-bit
270 extrd,u,*= $t1,%sar,1,$t1 ; executes on PA-RISC 1.0
353 if ($SZ==8 && $SIZE_T==4) # SHA512 for 32-bit PA-RISC 1.0
685 .STRINGZ "SHA`64*$SZ` block transform for PA-RISC, CRYPTOGAMS by <appro\@openssl.org>"
688 # Explicitly encode PA-RISC 2.0 instructions used in this module, so
sha1-parisc.pl 10 # SHA1 block procedure for PA-RISC.
253 .STRINGZ "SHA1 block transform for PA-RISC, CRYPTOGAMS by <appro\@openssl.org>"
  /bionic/libc/include/sys/
exec_elf.h 220 #define EM_PARISC 15 /* Hewlett-Packard PA-RISC */
233 #define EM_ARM 40 /* Advanced RISC Machines ARM */
238 #define EM_ARC 45 /* Argonaut RISC Core */
249 #define EM_NCPU 56 /* Sony nCPU embedded RISC processor */
302 #define EM_ARCA 109 /* Arca RISC microprocessor */
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  /external/qemu/distrib/sdl-1.2.15/src/video/riscos/
SDL_riscossprite.c 25 File added by Alan Buckley (alan_baa@hotmail.com) for RISC OS compatability
SDL_wimppoll.c 25 File added by Alan Buckley (alan_baa@hotmail.com) for RISC OS compatability
SDL_riscosmouse.c 25 File added by Alan Buckley (alan_baa@hotmail.com) for RISC OS compatability
SDL_riscosFullScreenVideo.c 25 File added by Alan Buckley (alan_baa@hotmail.com) for RISC OS compatability
28 Implements RISC OS full screen display.
  /external/jpeg/
config.guess 133 arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*)
219 RISC*:Mach:*:*)
222 RISC*:ULTRIX:*:*)
  /external/qemu/distrib/jpeg-6b/
config.guess 133 arm:RISC*:1.[012]*:*|arm:riscix:1.[012]*:*)
219 RISC*:Mach:*:*)
222 RISC*:ULTRIX:*:*)
  /external/llvm/lib/Support/
Path.cpp 129 case 0x90: // PA-RISC Windows
  /external/openssl/crypto/bf/
bf_locl.h 185 * This is normally very good on RISC platforms where normally you
  /external/clang/test/CodeGen/
c11atomics.c 5 // on RISC platforms, where the compare-exchange loop becomes a ll/sc pair for
8 // noticeable, impact on platforms like x86 and RISC-V, where there are atomic
  /external/libpcap/
configure.in 750 dnl for 32-bit PA-RISC, but should be left as "so" for
751 dnl 64-bit PA-RISC or, I suspect, IA-64.
  /external/oprofile/utils/
ophelp.c 652 "See loongson2 RISC Microprocessor Family Reference Manual\n";
671 "See MPC7450 RISC Microprocessor Family Reference "
  /external/valgrind/main/memcheck/tests/
vcpu_fbench.c 214 2.96 5.17 Sun 4/260, Sparc RISC processor. Sun C,
232 0.60 1.07 Intel 860 RISC processor, 33 Mhz, Greenhills
  /external/valgrind/main/perf/
fbench.c 210 2.96 5.17 Sun 4/260, Sparc RISC processor. Sun C,
228 0.60 1.07 Intel 860 RISC processor, 33 Mhz, Greenhills
  /prebuilts/gcc/linux-x86/mips/mipsel-linux-android-4.6/bin/
mipsel-linux-android-readelf 
  /prebuilts/gcc/linux-x86/x86/i686-linux-android-4.6/bin/
i686-linux-android-readelf 
  /external/iptables/utils/
pf.os 459 #16384:64:1:68:M1460,N,W0,N,N,T,N,N,?12: RISCOS:3.70-4.36::RISC OS 3.70-4.36
460 12288:32:0:44:M536: RISC OS:3.70:4.10:RISC OS 3.70 inet 4.10
463 # 4096:64:1:56:M1460,N,N,T:T: RISC OS:3.70:freenet:RISC OS 3.70 freenet 2.00
  /external/openssl/crypto/bn/asm/
pa-risc2.s 2 ; PA-RISC 2.0 implementation of bn_asm code, based on the
13 ; See http://devresource.hp.com/ for more details on the PA-RISC
14 ; architecture. Also see the book "PA-RISC 2.0 Architecture"
160 ; PA-RISC 2.0 chips have two fully pipelined multipliers, thus
329 ; PA-RISC 2.0 chips have two fully pipelined multipliers, thus
    [all...]
pa-risc2W.s 2 ; PA-RISC 64-bit implementation of bn_asm code
7 ; See http://devresource.hp.com/ for more details on the PA-RISC
8 ; architecture. Also see the book "PA-RISC 2.0 Architecture"
152 ; PA-RISC 2.0 chips have two fully pipelined multipliers, thus
319 ; PA-RISC 2.0 chips have two fully pipelined multipliers, thus
    [all...]
  /external/qemu/
elf.h 696 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
697 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
698 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
    [all...]
  /external/clang/lib/Basic/
TargetInfo.cpp 29 // Set defaults. Defaults are set for a 32-bit RISC platform, like PPC or
  /external/valgrind/main/coregrind/m_demangle/
ansidecl.h 146 define __STDC__). The RISC/OS MIPS compiler defines these things

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