| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | 10 // This file implements the visit functions for mul, fmul, sdiv, udiv, fdiv,
185 BO->getOpcode() != Instruction::SDiv)) {
193 BO->getOpcode() == Instruction::SDiv)) {
197 if (PossiblyExactOperator *SDiv = dyn_cast<PossiblyExactOperator>(BO))
198 if (SDiv->isExact()) {
609 /// instructions (udiv and sdiv). It is called by the visitors to those integer
632 I.getOpcode()==Instruction::SDiv))
655 bool isSigned = I.getOpcode() == Instruction::SDiv;
774 // sdiv X, -1 == -X
778 // sdiv X, C --> ashr exact X, log2(C
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| optimize-max-0.ll | 13 %2 = sdiv i32 %1, 4
75 %14 = sdiv i32 %w, 2
77 %16 = sdiv i32 %x, 2
97 %24 = sdiv i32 %w, 2
155 %38 = sdiv i32 %37, 4
192 %52 = sdiv i32 %51, 2
226 %63 = sdiv i32 %62, 2
|
| 2008-04-28-CoalescerBug.ll | 99 %tmp13337 = sdiv i64 0, 0 ; <i64> [#uses=1]
112 %tmp13358 = sdiv i64 %tmp13354, %tmp13357 ; <i64> [#uses=1]
|
| 2007-11-30-LoadFolding-Bug.ll | 24 %tmp22.i = sdiv i32 0, 2 ; <i32> [#uses=2]
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 147 case ISD::SDIV:
155 if (N->getOpcode() == ISD::SDIV) {
165 unsigned Opcode = N->getOpcode() == ISD::SDIV ? SP::SDIVrr : SP::UDIVrr;
|
| /external/llvm/unittests/IR/ |
| ConstantsTest.cpp | 73 // @o = constant i1 sdiv(i1 -1, i1 1) ; overflow
77 // @p = constant i1 sdiv(i1 1 , i1 -1); overflow
211 CHECK(ConstantExpr::getSDiv(P0, P0), "sdiv i32 " P0STR ", " P0STR);
|
| /external/llvm/bindings/python/llvm/ |
| enumerations.py | 76 ('SDiv', 15),
|
| /external/llvm/include/llvm/IR/ |
| Operator.h | 76 /// which may exhibit overflow - Add, Sub, and Mul. It does not include SDiv,
129 /// PossiblyExactOperator - A udiv or sdiv instruction, which can be marked as
152 return OpC == Instruction::SDiv ||
343 : public ConcreteOperator<PossiblyExactOperator, Instruction::SDiv> {
|
| Instruction.def | 115 HANDLE_BINARY_INST(15, SDiv , BinaryOperator)
|
| /external/llvm/test/CodeGen/Generic/ |
| 2006-02-12-InsertLibcall.ll | 10 %tmp.114.i = sdiv i64 %tmp.2i, 3 ; <i64> [#uses=1]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-08-04-SubregLoweringBug3.ll | 22 %2 = sdiv i32 %1, 127773 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/InstCombine/ |
| sub.ll | 150 %X = sdiv i32 %A, 1123
154 ; CHECK: %Y = sdiv i32 %A, -1123
162 %C = sdiv i32 %B, 1234
166 ; CHECK: %C = sdiv i32 %B, 1234
|
| /external/llvm/test/Transforms/InstSimplify/ |
| undef.ll | 62 %r = sdiv i64 undef, 1
|
| /external/llvm/lib/Transforms/Utils/ |
| IntegerDivision.cpp | 86 /// code generated, e.g. at the sdiv instruction. This will generate a udiv in
385 assert((Div->getOpcode() == Instruction::SDiv ||
395 if (Div->getOpcode() == Instruction::SDiv) {
482 assert((Div->getOpcode() == Instruction::SDiv ||
508 if (Div->getOpcode() == Instruction::SDiv) {
|
| BypassSlowDivision.cpp | 232 bool UseDivOp = Opcode == Instruction::SDiv || Opcode == Instruction::UDiv;
234 bool UseSignedOp = Opcode == Instruction::SDiv ||
|
| /external/llvm/test/CodeGen/NVPTX/ |
| arithmetic-int.ll | 37 %ret = sdiv i64 %a, %b
134 %ret = sdiv i32 %a, %b
227 %ret = sdiv i16 %a, %b
|
| /external/llvm/include/llvm/ADT/ |
| APSInt.h | 102 *this = sdiv(RHS);
111 return IsUnsigned ? APSInt(udiv(RHS), true) : APSInt(sdiv(RHS), false);
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-06-21-LdStMultipleBug.ll | 44 %iftmp.40.0.neg = sdiv i32 0, -2 ; <i32> [#uses=2]
50 %iftmp.41.0.neg = sdiv i32 %iftmp.41.0.in, -2 ; <i32> [#uses=3]
|
| 2007-05-14-RegScavengerAssert.ll | 22 %tmp68 = sdiv i64 0, 0 ; <i64> [#uses=1]
|
| /external/llvm/test/Transforms/LICM/ |
| sinking.ll | 223 %tmp.6 = sdiv i32 %N, %N_addr.0.pn ; <i32> [#uses=1]
232 ; CHECK-NEXT: %tmp.6 = sdiv i32 %N, %N_addr.0.pn
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64instrs.ll | 91 %div = sdiv i64 %a, %b
|
| /external/llvm/test/CodeGen/R600/ |
| schedule-fs-loop-nested.ll | 11 %5 = sdiv i32 %4, 4
|
| /external/llvm/test/Transforms/Inline/ |
| 2009-01-13-RecursiveInlineCrash.ll | 151 %5 = sdiv i32 %size, 2 ; <i32> [#uses=1]
155 %9 = sdiv i32 %size, 2 ; <i32> [#uses=1]
160 %14 = sdiv i32 %size, 2 ; <i32> [#uses=1]
165 %19 = sdiv i32 %size, 2 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| 2012-01-02-nopreheader.ll | 21 %0 = sdiv i32 %n, undef
|
| /external/llvm/unittests/ADT/ |
| APIntTest.cpp | 168 EXPECT_EQ(neg_one, one.sdiv(neg_one));
169 EXPECT_EQ(neg_one, neg_one.sdiv(one));
170 EXPECT_EQ(one, neg_one.sdiv(neg_one));
171 EXPECT_EQ(one, one.sdiv(one));
|
